TSMC CLN40ULPOD 40nm Clock Generator PLL - 150MHz-750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 40nm
- ULP
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
TSMC CLN40ULPOD 40nm Clock Generator PLL - 150MHz-750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN40ULPOD 40nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN22ULPLVT 22nm Clock Generator PLL - 175MHz-875MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN22ULPLVT 22nm Clock Generator PLL - 350MHz-1750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN22ULPLVT 22nm Clock Generator PLL - 700MHz-3500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN22ULP 22nm Clock Generator PLL - 125MHz-625MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN22ULP 22nm Clock Generator PLL - 250MHz-1250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN22ULP 22nm Clock Generator PLL - 500MHz-2500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN12FFCLLLVT 12nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN12FFCLLLVT 12nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN12FFCLLLVT 12nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN12FFCLL 12nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN12FFCLL 12nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN12FFCLL 12nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L14LLP 14nm Clock Generator PLL - 125MHz-625MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L14LLP 14nm Clock Generator PLL - 250MHz-1250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L14LLP 14nm Clock Generator PLL - 500MHz-2500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L12LLP 12nm Clock Generator PLL - 125MHz-625MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L12LLP 12nm Clock Generator PLL - 250MHz-1250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L12LLP 12nm Clock Generator PLL - 500MHz-2500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.