Power on Reset IP, Input: 3.3V, UMC 0.5um process
Vrr=2.3V without Vfr, VCC=3.3V, Ivcc=17uA, B type IO, Power On Reset, UMC 0.5um Logic process.
- Power On Reset (POR)
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
Power on Reset IP, Input: 3.3V, UMC 0.5um process
Vrr=2.3V without Vfr, VCC=3.3V, Ivcc=17uA, B type IO, Power On Reset, UMC 0.5um Logic process.
Power on Reset IP, Input: 5V, UMC 0.5um process
Vrr=3.4V Vfr=3.0V, VCC=5V, Ivcc=17uA, B type IO, Power On Reset, UMC 0.5um Logic process.
Voltage Detector IP, Vdet: 3.3V, UMC 0.5um process
5V/3.3V detector VDT, UMC 0.5um Logic process.
PLL IP, Input: 20MHz - 24MHz, Output: 20MHz - 100MHz, UMC 0.5um process
Input 20M-24MHz, output 20M-100MHz, frequency synthesizable PLL, 0.5um Logic process.
Linear Regulator IP, Output: 5V/70mA, UMC 0.35um Logic process
5V with 70mA driving capability, Istb=120uA Linear Regulator, 0.35um Logic process.
RC Oscillator IP, Output: 10KHz, UMC 0.35um Logic process
Sub-low current with external-C, frequency 10KHz, VCCA=2.0V~3.3V, Ivcca
DC-DC IP, Input: 3.3V, Output: +/- 12.5V / +6V, UMC 0.35um Logic process
Three pulse width modulation, boosting voltage from 3.3V to +/-12.5V, and +6V, Ivcca=450uA @ Idrive=0.
RC Oscillator IP, Output: 27.5MHz, UMC 0.35um Logic process
27.5MHz trimmable RC Oscillator, UMC 0.35um Logic process.
A/D Converter IP, 10 bits, 300Ksps, UMC 0.35um Logic process
10-Bit 300KSPS single End Analog-to-Digital converter, UMC 0.35um Logic process.
Voltage Detector IP, Vdet: 2.55V, UMC 0.35um process
Vdet=2.55V Vhys=0.05V, VCC=3.3V, Ivcc=35uA, UMC 0.35um Logic process.
Linear Regulator IP, Output: 5V/150mA, UMC 0.35um process
5V with 150mA driving capability, Istb=120uA Linear Regulator, 0.35um Logic process.
Power on Reset IP, Input: 3.3V, UMC 0.35um process
Vrr=2.5V Vfr=2.3V, VCC=3.3V, Ivcc=18uA, Power On Reset, UMC 0.35um Logic process.
Linear Regulator IP, Output: 5V/50mA, UMC 0.35um process
5V with 50mA driving capability, Istb=124uA Linear Regulator, UMC 0.35um Logic process.
Band Gap IP, VBG=1.23V, UMC 0.35um process
The FXBG010H80A is a bandgap voltage reference circuit with low temperature coefficient, and high power supply rejection ratio wi…
Voltage Detector IP, 4 Levels, HJTC 0.18um eFlash/G2 process
4-level detector for USB applications, input 3.3V, Ivcca=115uA, HJTC 0.18um embedded flash (P-channel cell) process.
RC Oscillator IP, Input: 1.62V - 1.98V, Output: 50MHz, HJTC 0.18um eFlash/G2 process
Internal-RC, frequency 50MHz.
RC Oscillator IP, Input: 1.62V - 1.98V, Output: 40MHz, HJTC 0.18um eFlash/G2 process
Internal-RC, frequency 40MHz.
RC Oscillator IP, Input: 1.62V - 1.98V, Output: 100KHz, HJTC 0.18um eFlash/G2 process
Internal-RC, frequency 100KHz.
Power Switch IP, 2 inputs, HJTC 0.18um eFlash/G2 process
2 Input Power Switch, HJTC 0.18um eFlash process.
Power on Reset IP, Input: 2.5V/3.3V, HJTC 0.18um eFlash/G2 process
Vrr=2V Vfr=1.95V, input VCCK=1.8V VCC3IO=3.3V, 3.3V Power On Reset, special request by Hisilicon, HJTC 0.18um 2P6M eFlash process.