Ultra low quiescent current SIMO (single inductor multiple output) DCDC converter to provide high efficiency voltage regulation a…
- DC/DC Converter
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
Ultra low quiescent current SIMO (single inductor multiple output) DCDC converter to provide high efficiency voltage regulation a…
IP
IP
ADC controller for Faraday internal use.
ADC controller for Faraday internal use.
5V to 3.3V/1.8V with 80mA/40mA driving capability, Linear Regulator; UMC 0.162um GII process.
5V with 250mA driving capability, Istb=120uA Linear Regulator; 0.35um Logic process
5V with 250mA driving capability, Istb=120uA Linear Regulator; 0.35um Logic process
Vrr=1.96V Vfr=1.76V, input 3.3V, Core Type; Power On Reset; UMC 0.35um Logic process
Vrr=1.96V Vfr=1.76V, input 3.3V, Core Type; Power On Reset; UMC 0.35um Logic process
Power Management Unit(5-sets DC-DC, 2-sets REG, PowerSwitch, and Li-ion Charger) for Audio Platform; UMC 0.35um 3.3V/5V CDMOS pro…
8V ~ 25V HV driver, UMC 0.35um 3.3V/5V/40V CDMOS logic process
8V ~ 25V HV driver, UMC 0.35um 3.3V/5V/40V CDMOS logic process
5V to 4.2V battery charger with 3.3V device ; UMC 0.153um Logic/Mixed-Mode Process
5V to 4.2V battery charger with 3.3V device ; UMC 0.153um Logic/Mixed-Mode Process
Input 3V-3.6V, VBG=1.23V BandGap; UMC 0.35um CDMOS Process
Input 3V-3.6V, VBG=1.23V BandGap; UMC 0.35um CDMOS Process
24bit 96KHz A/D converter, 1.8V 3-channel Sigma-Delta Audio ADC; HJTC 0.18um eFlash process
24bit 96KHz A/D converter, 1.8V 3-channel Sigma-Delta Audio ADC; HJTC 0.18um eFlash process
1.8V 10bit 80MSPS Dual-Channel Pipelined ADC; UMC 0.153um Logic Process_x005F_x000D_
1.8V 10bit 80MSPS Dual-Channel Pipelined ADC; UMC 0.153um Logic Process
1.8V 10bit 80MSPS Pipelined ADC; UMC 0.153um Logic Process
1.8V 10bit 80MSPS Pipelined ADC; UMC 0.153um Logic Process
UE LTE (Cat-0 – Cat-5) / 3G wideband transceiver for flexible SDR pipelines, 400 MHz – 2.8 GHz.
The SDR transceiver IP provides wideband, programmable RF front-ends for multi-standard wireless platforms.
Wideband 2×2 MIMO transceiver, 400 MHz – 3.6 GHz, suitable for SDR-style eNodeB designs.
The SDR transceiver IP provides wideband, programmable RF front-ends for multi-standard wireless platforms.
11-bit 2-channel (I/Q) current-mode DAC, 640 MHz, 2.7 mW, SNDR 63 dB
The data converter IP portfolio includes low-power SAR ADCs, flash ADCs, and high-speed I/Q DACs optimized for RF and baseband pa…
10-bit 2-channel (I/Q) SAR ADC, 160 MHz, 8 mW per channel, SNDR 53 dB
The data converter IP portfolio includes low-power SAR ADCs, flash ADCs, and high-speed I/Q DACs optimized for RF and baseband pa…
Ultra-low power and low jitter PLL
IP
IP