A/D Converter IP, 10 bits, 10Msps - 50Msps, UMC 90nm SP process
1.0V/3.3V 10-Bit 10MSPS~50MSPS Dual channel Pipelined Analog-to-Digital converter with optional power scaling, UMC 90nm SP Low-K …
- 10 Bit
- UMC
- 90nm
- SP
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
A/D Converter IP, 10 bits, 10Msps - 50Msps, UMC 90nm SP process
1.0V/3.3V 10-Bit 10MSPS~50MSPS Dual channel Pipelined Analog-to-Digital converter with optional power scaling, UMC 90nm SP Low-K …
A/D Converter IP, 10 bits, 10Msps - 50Msps, UMC 0.11um HS/AE process
1.2V/3.3V 10-Bit 10MSPS-50MSPS Pipelined Analog-to-Digital converter with optional power scalable, UMC 0.11um HS/AE Logic process.
This IP is gds completed and was verified by simulation.
Bandgap reference circuit with high PSRR
GLOBALFOUNDRIES 40nm LP 3.3V-2.5/1.1V Power Regulator
This IP is a Low-Dropout (LDO) 3.3V to 2.5V and/or 1.1V power regulator in GLOBALFOUNDRIES 40nm LP 1.1V/2.5V process.
CMOS Low Power Programmable Frequency Divider(50-2400 MHz)
IP
Poly Phase CMOS Programmable Frequency Divider (50-2400 MHz)
IP
915MHz - 930MHz RPA12C Single stage low power low current PA
IP
The S65LLV25_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifie…
The S65LLV25_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifie…
The S13V33_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifier,…
The S13V33_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifier,…
This IP is a programmable Analog PLL suitable for high speed clock generation.
The present IP is a VCC Detector (VDT) circuit.
The present IP is a VCC Detector (VDT) circuit.
GSMC 0.18um 3.3V Trimming Block
This IP is suitable for voltage trimming.
GSMC 0.18um 3.3v RC oscillator with internal R and C to generate 32±20%KHz clock.
The present IP is a RC oscillator with internal R and C to generate 32KHz±30% clock.
GSMC 0.18um 3.3v/1.8v 80mA power regulator
Present project is a regulator that generates 1.8v voltage from 3.3v power supply.
GSMC 0.18µm 5v-5v/3v/1.8v Power Regulator
This IP is a Low-Dropout (LDO) 5V to 5V/3V/1.8V power regulator in GSMC 0.18μm Logic/EFLASH process.
GSMC 0.18um 3.3V Power on Reset
The present Power-On-Reset circuit generates system reset pulses (RST) when the power supplier is from 1.62V to 3.6V.