2.7V~3.3V to 1.8V with 150mA driving capability; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process
- UMC
- 55nm
- LP
LDO Voltage Regulator IP cores provide low-noise linear voltage regulation for sensitive loads in modern SoC and ASIC designs.
These IP cores are widely used to create clean local supplies for analog, RF, sensor, and always-on circuits where noise and simplicity matter more than peak switching efficiency
This catalog allows you to compare LDO Voltage Regulator IP cores from leading vendors based on dropout voltage, output noise, load regulation, and process node compatibility.
Whether you are designing analog subsystems, RF circuits, sensor interfaces, or always-on domains, you can find the right LDO Voltage Regulator IP for your application.
2.7V~3.3V to 1.8V with 150mA driving capability; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process
HHGrace 0.18um 5v-1.125v Power Regulator
The Power Regulator is to provide 1.125v power supplies which are regulated from the single 5v input supply.
HHGrace 0.18um 5v-1.8/3.3v Power Regulator
The Power Regulator is to provide both 3.3v and 1.8v power supplies which are regulated from thesingle 5v input supply.
HHGrace 0.18um 3.3v-1.8v Power Regulator
This IP is a Low-Dropout (LDO) 3.3V to 1.62 V power regulator with two channel 1.8V output.
GSMC 0.13um 5v-1.5v Power Regulator
This IP is a Low-Dropout (LDO) 5V to 1.5V power regulator with two channel outputs.
Linear Regulator IP, UMC 0.18um G2 process
Input 2.7V~3.6V, Output=1.8V,Loading 50mA Regulator, UMC 0.18um GII 1.8V/3.3V Process
Linear Regulator IP, UMC 0.11um HS/AE process
3.3V to 1.2V Capacitor-Free Linear Regulator with 100mA driving capability, UMC 0.11um HS/AE (AL Enhancement) Logic Process
1.0~3.6V input, loading 20mA, 0.9V output with VBG=0.75V Linear Regulator, UMC 55nm ULP/UHVT Low-K Logic Process
Linear Regulator IP, UMC 90nm SP process
3.3V to 1.0V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process.
Linear Regulator IP, UMC 90nm SP process
2.5V to 1.2V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process.
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.1V/100mA REG, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, UMC 40nm LP process
1.8V and 1.2V input, loading 360mA, 1.1V output with VBG=0.88V Regulator with BYPASS mode, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.8V with 150mA driving capability, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, UMC 0.13um HS/FSG process
USB 2.0 Two Port PHY, UMC 0.13um HS/FSG Logic process.
Linear Regulator IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V to 1.2V with 100mA driving capability, Linear Regulator with Capacitor-Free.
Linear Regulator IP, Output: 3.3V/70mA, UMC 0.25um process
3.3V with 70mA driving capability, Istb=75uA Linear Regulator, 0.25um Logic process.
Linear Regulator IP, Output: 3.3V/250mA, UMC 0.25um process
3.3V with 250mA driving capability, Istb=85uA Linear Regulator, UMC 0.25um Logic process.
Linear Regulator IP, Output: 3.3V/150mA, UMC 0.25um process
3.3V with 150mA driving capability, Istb=75uA Linear Regulator, 0.25um Logic process.
Linear Regulator IP, Input: 4.0V-5.5V, Output: 3.3V / 250mA, 1.8V / 70mA, UMC 0.18um G2 process
5V with 250mA driving capability, Istb=120uA Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 2.0V-4.0V, Output: 1.8V / 100mA, UMC 0.18um G2 process
3.3V with 100mA driving capability, Istb=100uA Linear Regulator, 0.18um GII Logic process.