Vendor: Omni Design Technologies, Inc. Category: PLL

8 Channels, 12 bit, 2GS/s Swift™ ADCs, and 4 Channels, 12 bit, 200 MS/s Swift™ ADC with Integrated PLL

The ODT-AFE-12A1P2T-16FFCT is an ultra highperformance AFE designed in a 16nm CMOS process.

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TSMC 16nm View all specifications

Overview

The ODT-AFE-12A1P2T-16FFCT is an ultra highperformance AFE designed in a 16nm CMOS process.

The AFE includes eight 12-bit, 2GSPS ADCs, four 12-bit 200MSPS ADCs, two TV monitors, multiple LDOs for ADC supplies, and a low jitter fractional-N PLL.

The ADC architecture is optimized to maximize performance while minimizing power and area consumption.

To maximize SNR, the AFE includes an ultra-lowjitter clock distribution network.

Key features

  • TSMC 16/12nm FFC
  • Ultra high-performance AFE
  • Eight 2GSPS ADCs ODT-ADS-12B2G-T16
  • Four 200MSPS ADCs ODT-ADS-12B200M-T16
  • Low jitter PLL
  • Two Temperature-voltage monitors ODT-TVM-1P0-T16
  • Multiple ADC LDOs ODT-LDO-IC-250M-16FFCT
  • PLL bypass mode
  • ADC Clock distribution network
  • ADC Clock divider synchronization logic
  • Integrated ESD and bumps

Applications

  • General purpose software defined radio
  • High speed data acquisition systems
  • Cellular base station
  • Broadband communications
  • High-speed medical imaging
  • Wideband satellite receiver 

What’s Included?

  • Datasheet
  • Hard Macro (GDSII)
  • Characterization Report (as applicable)
  • Abstract View (LEF) for top level connectivity
  • Spectre Netlist (as needed upon request)
  • Behavioral Model
  • Integration Guidelines
  • Integration and Customer Support

Silicon Options

Foundry Node Process Maturity
TSMC 16nm 16nm 160 nm —

Specifications

Identity

Part Number
ODT-AFE-12A1P2T-16FFCT
Vendor
Omni Design Technologies, Inc.
Type
Silicon IP

Provider

Contact Omni Design Technologies, Inc.

Learn more about PLL IP core

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Specifying a PLL Part 3: Jitter Budgeting for Synthesis

This white paper is aimed at system architects and physical implementation leaders working on the design of SoCs. It can be confusing to understand the impact of different jitter sources and how to calculate a jitter budget when specifying a digital system. This white paper explains how jitter changes the period of a clock and how to ensure that jitter has correctly been accounted for in the calculations for timing closure.

Specifying a PLL Part 2: Jitter Basics

This article explains a some of the key terminology and parameters commonly used to describe jitter. It will also help clarify the most important parameters for a some PLL applications, allowing the designer to better understand what is required from a PLL.

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Achieving Groundbreaking Performance with a Digital PLL

This article compares analog, first-generation digital, and second-generation digital PLLs. It evaluates which type of PLL may be best in which situation. It further discloses a roadmap into other application areas, including general purpose / logic clocking, and regular low-jitter PLLs.

Frequently asked questions about PLL IP cores

What is 8 Channels, 12 bit, 2GS/s Swift™ ADCs, and 4 Channels, 12 bit, 200 MS/s Swift™ ADC with Integrated PLL?

8 Channels, 12 bit, 2GS/s Swift™ ADCs, and 4 Channels, 12 bit, 200 MS/s Swift™ ADC with Integrated PLL is a PLL IP core from Omni Design Technologies, Inc. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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