Vendor: KNiulink Semiconductor Ltd. Category: Multi-Protocol PHY

64G SerDes

4 Channels per Quad, ≤64Gbps; PAM4 support 25~64Gbps; NRZ support 2.5~32Gbps

Key features

  • 4 Channels per Quad, ≤64Gbps; PAM4 support 25~64Gbps; NRZ support 2.5~32Gbps
  • Serialization/Deserialization interface width; 64/32/16bits; 64-bit parallel data path in PAM4 mode; 32-bit parallel data path in full-rate NRZ mode; 16-bit and 32-bit parallel data path widths in half-rate and quarter-rate modes
  • Four programmable transmitter and receiver configurations selectable by port by using hardware pins or registers. Facilitates fast speed switching during speed negotiation routines
  • Aggressive equalization capability to enable 64Gbps operation and legacy system upgrades
  • Feed Forward Equalization (FFE) driver equalization
  • Adaptive and configurable RX Continuous Time Linear Equalizer (CTLE), Feed Forward Equalizer (FFE) and Decision Feedback Equalizer (DFE)
  • Digital-based receiver consisting of the following: Analog Front-End (AFE) Analog-to-Digital Converter (ADC) Digital Signal Processor (DSP)
  • Digitally-control-impedance termination resistors;
  • Configurable Tx output differential voltage swing;
  • Support for manufacturing and system test
  • Generalized scan design compliant with manufacturing functional (macro) tests
  • Full-rate loopback and Built-In Self-Tests (BIST) with selectable PRBS patterns
  • Compatible with IEEE 1149.6-2003 ACJTAG
  • Supports Flip-Chip package

Block Diagram

What’s Included?

  • GDSII&CDL Netlist
  • Verilog Model
  • LEF Layout Abstract(.LEF)
  • Liberty Timing Models(.lib)
  • Verify Results
  • Specification
  • Datasheet
  • Integration Guideline
  • Evaluation Plan
  • Leading support for package design, SI&PI modeling and production test development

Specifications

Identity

Part Number
64G SerDes
Vendor
KNiulink Semiconductor Ltd.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Frequently asked questions about Multi-Protocol PHY IP cores

What is 64G SerDes?

64G SerDes is a Multi-Protocol PHY IP core from KNiulink Semiconductor Ltd. listed on Semi IP Hub.

How should engineers evaluate this Multi-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Multi-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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