Vendor: Dolphin Semiconductor Category: Standard Cell Libraries

6 track Ultra High Density standard cell library at TSMC 55 nm

TSMC 55 LP, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spi…

TSMC 55nm GP Pre-Silicon View all specifications

Overview

TSMC 55 LP, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spinner cells (densest alternative to flip-flops).

Key features

  • Ultra High Density
  • 7% up to 15% denser after P&R compared to standard 7-Track library
  • Pulsed latches as ?Spinner Cells? instead of D-flip-flops: for min. 30% gain in density
  • Metal layer 2 available for routing as only Metal 1 used for cell design
  • 6-Track cells for optimal area reduction
  • Power reduction features
  • 30% less power consumption versus 7-Track library at nominal voltage
  • Low Voltage Capability for additional power savings when operating down to 1.0 V +/-10%
  • Smooth implementation
  • Pulse generation automated by the script for Insert pulse generation
  • Spinner cell design minimizing hold time violations
  • Optimal Design for Yield
  • Design methodology ensuring High-Yield circuits despite Mismatch

Silicon Options

Foundry Node Process Maturity
TSMC 55nm GP Pre-Silicon

Specifications

Identity

Part Number
SESAME-uHD-BTF-DV_TSMC_55nm_LP_SVT
Vendor
Dolphin Semiconductor
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Standard Cell Libraries IP core

Dolphin Semiconductor and INTERA Group Announce Reference Platform Combining Analog Voice Sensing and Neuromorphic AI for Ultra-Low-Power Edge Intelligence

Dolphin Semiconductor, a leading provider of semiconductor IP solutions, and INTERA Group, a semiconductor innovation company specializing in neuromorphic ASIC architectures, today announced a strategic collaboration to deliver a joint reference platform combining Dolphin’s WhisperExtractor (aMFCC) analog feature-extraction IP with INTERA’s Spiking Neural Network (SNN) processing architecture.

Vertex Growth commits €10M in Dolphin Semiconductor

Vertex Growth is a growth-stage venture capital fund anchored by Vertex Holdings, a subsidiary of global investment firm Temasek. The fund is dedicated to investing in high potential companies on the cusp of scaling-up.

Frequently asked questions about standard cell libraries

What is 6 track Ultra High Density standard cell library at TSMC 55 nm?

6 track Ultra High Density standard cell library at TSMC 55 nm is a Standard Cell Libraries IP core from Dolphin Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.

How should engineers evaluate this Standard Cell Libraries?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Standard Cell Libraries IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP