Vendor: Aragio Solutions Category: GPIO

3.3V Wide Ranging GPIO

The 3.3V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core p…

TSMC 16nm Silicon Proven View all specifications

Overview

The 3.3V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and
analog power cells along with the necessary support cells to construct a complete pad ring by abutment. An included rail splitter allows
multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.

What’s Included?

  • a. Physical abstract in LEF format (.lef)
  • b. Timing models in Synopsys Liberty formats (.lib and .db)
  • c. Calibre compatible LVS netlist in CDL format (.cdl)
  • d. GDSII stream (.gds)
  • e. Behavioral Verilog (.v)
  • f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
  • g. Databook (.pdf)
  • h. Library User Guide - ESD Guidelines (.pdf)

Silicon Options

Foundry Node Process Maturity
TSMC 16nm 16nm 160 nm Silicon Proven

Specifications

Identity

Part Number
RGO_TSMC16_18V33_FFC_20C
Vendor
Aragio Solutions
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Frequently asked questions about GPIO Pad Library IP cores

What is 3.3V Wide Ranging GPIO?

3.3V Wide Ranging GPIO is a GPIO IP core from Aragio Solutions listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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