Aragio Solutions Achieves ISO 9001:2015 Certification
Aragio Solutions, an industry leader and full-service provider of semiconductor IO design IP, is pleased to announce today that it has earned ISO 9001 certification.
Vendor:
Aragio Solutions
Category:
GPIO
3.3V Wide-Range General Purpose Staggered I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core po…
Overview
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power cells along with the necessary support cells to construct a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
Key features
- ? Multi-Voltage (1.8V, 2.5V, 3.3V)
- ? LVCMOS / LVTTL input with selectable hysteresis
- ? Programmable drive strength (rated 2mA to 12mA)
- ? Selectable output slew rate
- ? Optimized for EMC with SSO factor of 8
- ? Open-drain output mode
- ? Programmable input options (pull-up/pull-down/repeater)
- ? Power-On Start (POS) capable
- ? Power sequencing independent design with Power-On Control
- ? Fault tolerant cell provides fail-safe operation
What’s Included?
- a. Physical abstract in LEF format (.lef)
- b. Timing models in Synopsys Liberty formats (.lib and .db)
- c. Calibre compatible LVS netlist in CDL format (.cdl)
- d. GDSII stream (.gds)
- e. Behavioral Verilog (.v)
- f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- g. Databook (.pdf)
- h. Library User Guide - ESD Guidelines (.pdf)
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 40nm | G | Silicon Proven |
Specifications
Identity
Part Number
RGO_TSMC40_25V33_LP_30C
Vendor
Aragio Solutions
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
Learn more about GPIO IP core
Aragio Solutions Offers Suite of Programmable GPIO I/O Libraries Supporting 65nm Common Platform Technology Available for Chartered Customers
ARAGIO announced today the immediate availability of silicon-proven I/O libraries for the 65-nanometer (nm) Common Platform technology process available from Chartered Semiconductor Manufacturing Ltd.
Aragio Solutions Offers Suite of High-Performance Mixed-Signal IP and I/O Libraries Targeted to Advanced Processes from Chartered
Critical IP Components Available on Chartered’s Leading-Edge Manufacturing Platform
Frequently asked questions about GPIO Pad Library IP cores
What is 3.3V Wide-Range General Purpose Staggered I/O Pad Set?
3.3V Wide-Range General Purpose Staggered I/O Pad Set is a GPIO IP core from Aragio Solutions listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
How should engineers evaluate this GPIO?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.