Vendor: T2M GmbH Category: DAC

16bit 5Gsps silicon proven High performance Current Steering DAC IP Core

16-bit 5GSPS DAC IP Core utilizes a high-performance current steering design and offers the option of either a differential curre…

Overview

16-bit 5GSPS DAC IP Core utilizes a high-performance current steering design and offers the option of either a differential current output or a differential voltage output. It includes a bandgap and current source to form a comprehensive DAC. This DAC can be customized to adjust the full-scale output range and features all necessary calibration circuitry for exceptional static and dynamic linearity performance. Its proprietary architecture minimizes harmonic and intermodulation distortions, particularly at high output frequencies and amplitudes. This data converter IP cores cover sampling rates from a few MSPS to over 20GSPS and resolutions ranging from 6 to 14 bits.

Key features

  • 16bit Resolution
  • 5 GSPS Update rate.
  • Functional from -40 deg C to 125 deg C
  • Reduces noise and power consumption.
  • Provides accurate charge transfer without the need for calibration.
  • Simplifies high-performance analog designs.

Benefits

  • Excellent linearity
  • Compact area
  • High-performance low power
  • Complete subsystem with:
  • Bandgap reference
  • Support for I/Q and array configurations

Applications

  • 5G Wireless Infrastructure
  • General purpose software defined radio.
  • High speed data acquisition systems
  • Cellular base station
  • Broadband communications
  • High-speed medical imaging
  • Wideband satellite receiver
  • Wireline Communication
  • Wireless Communication
  • Low Power IoT

What’s Included?

  • CDL netlists
  • Liberty timings
  • Verilog description
  • A full datasheet
  • An integration note.

Specifications

Identity

Part Number
16bit 5Gsps Current Steering DAC IP Core
Vendor
T2M GmbH
Type
Silicon IP

Analog

Resolution bits
16 Bit

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Germany

Learn more about DAC IP core

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Frequently asked questions about DAC IP cores

What is 16bit 5Gsps silicon proven High performance Current Steering DAC IP Core?

16bit 5Gsps silicon proven High performance Current Steering DAC IP Core is a DAC IP core from T2M GmbH listed on Semi IP Hub.

How should engineers evaluate this DAC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DAC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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