1571.3 to 1606.4 MHz Mixer
The cell includes matched input, intermediate and output buffers with gain control, separated quadrature mixers and polyphase fil…
Overview
The cell includes matched input, intermediate and output buffers with gain control, separated quadrature mixers and polyphase filter. Quadrature mixer is based on Gilbert cells and converts RF frequency to a low intermediate frequency (IF). Polyphase filter is used to block image
frequency signal. Buffer amplifiers are used to improve qualitative characteristics, reduce input signals and improve output signals, reduce rejection, harmonic and intermodulation distortions.
The block is fabricated on SMIC CMOS 0.18 um technology.
Key features
- SMIC CMOS 0.18 um
- Adjusted gain
- Build-in matched input
- Reference current 10 uA
- Supply voltage 1.8 V
- Temperature compensation
- Adding of build-in 1.8 V voltage regulator available
- Portable to other technologies (upon request)
Block Diagram
Applications
- Mobile devices
- Navigation receiver
What’s Included?
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| SMIC | 180nm | G | Silicon Proven |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about RF Front End IP cores
What is 1571.3 to 1606.4 MHz Mixer?
1571.3 to 1606.4 MHz Mixer is a RF Front End IP core from NTLab listed on Semi IP Hub. It is listed with support for smic Silicon Proven.
How should engineers evaluate this RF Front End?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this RF Front End IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.