Overview
A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V to 5V GPIO, 1.8V to 5V analog, with ultra low-cap/low-leakage RF solutions.
This silicon proven flip-chip compatible library in TSMC 180nm BCD features a multi-voltage GPIO, 1.8V to 5V analog I/O, and ultra-low capacitance and low leakage 36V+ ESD solutions. The library also includes 5V RF pads. The I/O library does not have poly orientation issues, and any I/O can be used in any orientation. Currently, a standard bondpad does not exist for this library, but it is designed to accommodate any bondpad with a 60um pitch and a less than 75um height. The GPIO can operate at a standard input of 250MHz and an output of 50MHz. The library analog cell can support 5V analog I/Os as well as 1.8V. The high voltage cells in the libraries can support 36V+, providing low capacitance and low leakage. The library also supports I2C, DDC, CEC and SMBus standards. The library includes all layout and support cells. ESD targets are 2kV HBM and 500V CDM, although the I/Os have passed >4kV HBM and >800V CDM in silicon, depending on packaging. Latch-up immunity has passed >150mA.
Operating Conditions
| Parameter |
Value |
| VDDIO |
1.8V to 5V |
| Core VDD |
1.8V |
| BEOL |
1P6M |
| Tempeature |
-40C to 125C |
| ESD |
2kV HBM & 500V CDM |
Cell Summary
| Item |
Size |
| MS18 GPIO |
250Mhz input/50MHz output |
| MS18 ANA |
1.2V to 3.3V analog |
| MS18 VPP |
Nominal 0V-1.8V, up to 6V |
| MS18 HVANA |
36V+ Analog I/O |
ESD Summary
- ESD targets of 2kV HBM and 500V CDM, has passed >4kV HBM and >800V CDM
Standards
Learn more about Analog IP core
Certus Semiconductor’s I/O libraries for TSMC’s 22nm ultra-low leakage (22ULL) and 22nm ultra-low power (22ULP) technologies offer robust, high-performance solutions tailored to a wide range of SoC designs — from ultra-low power IoT nodes to demanding consumer and automotive systems. Whether you need low leakage, high drive strength, or analog compatibility, our production-proven IP covers it all.
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