ESD Library IP Listing

Full Radiation-Hardened ESD Library in GF 12nm LP/LP+

• GlobalFoundries
• 12nm
• LP

RF ESD cells in TSMC 55nm LP targetting low-capacitance ESD protection.

• TSMC
• 55nm
• GP

A GlobalFoundries 28nm Stand-Alone ESD Structure This ESD library is a silicon-proven set of discrete, pad-independent ESD clamps…

• GlobalFoundries
• 28nm
• Silicon Proven

The ESD Protection library provides ESD protection components.

• TSMC
• 7nm
• N7+
• Silicon Proven

The USB 2.0 OTG ESD Protection library provides a comprehensive ESD solution for USB 2.0 hard macro cells.

• GlobalFoundries
• 65nm
• G
• Silicon Proven

A 3.3V wirebond I/O library with 8kV HBM ESD protection, a 1.2Gbps LVDS, GPIO, and I2C compliant ODIO in an ultra-small footprint.

• GPIO

UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.8V Analog ESD IO cell Library

• UMC
• 28nm
• Silicon Proven

UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.05V Analog ESD IO cell Library

• UMC
• 28nm
• Silicon Proven

UMC 28nm Logic and Mixed-Mode HPC Process 3.3V Analog ESD IO cell Library

• UMC
• 28nm

UMC 28nm Logic and Mixed-Mode HPC Process, 1.8V Analog ESD IO cell Library

• UMC
• 28nm

UMC 28nm Logic and Mixed-Mode HPC Process,0.9V Analog ESD IO cell Library

• UMC
• 28nm

UMC 55nm e-flash Logic Process , 3.3V Analog ESD IO cell Library

• UMC
• 55nm
• Silicon Proven

UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO

• UMC
• 90nm
• LL

UMC 90nm LL/RVT LowK process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO

• UMC
• 90nm
• LL

UMC 90nm SP/RVT process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO

• UMC
• 90nm
• SP

UMC 90nm SP/RVT Low-K process true 3.3V Analog ESD IO cell Library Using 3.3V GOX52 IO

• UMC
• 90nm
• SP

The I3C library provides a bi-directional I/O driver designed for the I3C two-line interface.

• GPIO
• Pre-Silicon
• Available Now
• I3C

The RF libraries include analog signal pads and ESD protection components for RF applications.

• GlobalFoundries
• 55nm
• Silicon Proven

A 1.8V/3.3V flip-chip I/O library with ESD-immune GPIOs and integrated POC circuitry in TSMC FFC/FFC+.

• TSMC
• 12nm
• FFC+

The 1.2V GPIO library provides an open-drain bi-directional I/O driver designed for the SVID three-line interface.

• GPIO
• Pre-Silicon
• Available now
• GPIO, SVID