Vendor: Aragio Solutions Category: GPIO

1.2V GPIO library designed for the SVID three-line interface.

The 1.2V GPIO library provides an open-drain bi-directional I/O driver designed for the SVID three-line interface.

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Overview

The 1.2V GPIO library provides an open-drain bi-directional I/O driver designed for the SVID three-line interface. It is compliant with the Intel SVID specification.
This 5nm library is available in an inline flip chip implementation.
To design a functional I/O power domain with this cell, an additional library is required – 1.8V Support: Power. That library contains isolated analog I/O, and a full complement of power cells along with spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.

Key features

  • Open drain operation only
    • 24mA rated sink current @ 1.2V
  • Operating frequency – up to 25MHz
  • Fault-tolerant to 1.32V at PAD (no current flow when DVDD = 0V)
  • Output enable
  • Receiver enable
  • Standard LVCMOS compatible input with Schmitt trigger (hysteresis)
  • Power-on sequencing independent design with Power-On Control
  • DVDD = 1.08V to 1.32V
  • Pad VDDP = 0.95V to 1.08V – independent of DVDD
  • The circuit consumes no DC supply current in the static state
  • A pull-down function is provided to prevent the PAD port from floating when an open-drain configuration is not used on the system board.

What’s Included?

  • Physical abstract in LEF format (.lef)
  • Timing models in Synopsys Liberty formats (.lib and .db)
  • Calibre compatible LVS netlist in CDL format (.cdl)
  • GDSII stream (.gds)
  • Behavioral Verilog (.v)
  • Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
  • Databook (.pdf)
  • Library User Guide - ESD Guidelines (.pdf)

Specifications

Identity

Part Number
RGO_TSMC05_15V12_N5_45F_SVD
Vendor
Aragio Solutions
Type
Silicon IP

Provider

Contact Aragio Solutions

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Frequently asked questions about GPIO Pad Library IP cores

What is 1.2V GPIO library designed for the SVID three-line interface.?

1.2V GPIO library designed for the SVID three-line interface. is a GPIO IP core from Aragio Solutions listed on Semi IP Hub.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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