The DUSB2 is hardware implementation of full/high-speed peripheral controller that interfaces to the UTMI bus transceiver.
- USB
- now
- USB Specification Revision …
The DUSB2 is hardware implementation of full/high-speed peripheral controller that interfaces to the UTMI bus transceiver.
The USB 2.0 soft core facilitates data transmission up to 480 Mbps and is ideally suited for high-speed devices like CD-Rom drive…
The Universal Serial Bus Device controller (GRUSBDC) provides an interface between an USB 2.0 bus and an AMBA-AHB bus.
USB 2.0 Device Controller IP, Device controller, Soft IP
USB 2.0 device controller.
We provide configurable USB 2.0 device controller IP Cores.
USB 2.0 Device Controller version 4 with Active Clock Gating to save active power
The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers …
USB 2.0 Device Controller with ULPI interface
The DUSB2-ULPI is a hardware implementation of a full/high-speed peripheral controller that interfaces to an ULPI bus transceiver.
The Xilinx Universal Serial Bus 2.0 High Speed Device with Advance Micro controller Bus Architecture eXtensible Interface (AXI) e…
Certified USB2.0 Device Controller
GDA’s USB 2.0 Device controller is a configurable core and implements the USB 2.0 Device functionality that can be interfaced wit…
The USB 2.0 Device IP core is Arasan’s latest development that enables designers in the PC, mobile, consumer and communication ma…
Mature controller solution for OTG and Device applications The USB 2.0 Controller IP products have been available since 1999, are…
USB 2.0 OTG Dual Role Device (DRD) Controller
The Arasan USB 2.0 OTG DRD IP Core is compliant with the OTG Supplement Rev.
USB 3.1 PHY (10G/5G) in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) inTSMC (16nm, 12nm, N7, N6, N5,N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) in Samsung (14nm, 11nm, 10nm, 8nm, SF5, SF5A, SF4E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
The USB 2.0 OTG IP Core is compliant with the OTG Supplement Rev.
USB-C 3.1/DP TX PHY in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1 DP/TX PHY ebdaux in TSMC (N5, N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1 SS/SSP PHY in Type-C in TSMC (16nm, 12nm, N7, N6, N5, N5A)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1/DP TX PHY in Samsung (14nm, 11nm, 5nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.