Memory Controller IP Listing

Delivers excellent performance in addition to high utilization and ultra-low latency, achieved by its proprietary out-of-scheduli…

• DDR

High-Performance SPI Master/Slave with HyperBus™ & xSPI Support The HyperBus™ Memory Controller IP Core is a high-speed, fully co…

• DDR

Produced by DRAM manufacturers such as Samsung and Micron, High Bandwidth Memory or HBM, provides users with high bandwidth, low …

• HBM

Rambus is offering the industry’s first HBM4 Controller IP core designed to support customers with deploying a new generation of …

• HBM
• Now
• High Bandwidth Memory (HBM)

The Rambus HBM3E / HBM3 controller cores are designed for use in applications requiring high memory bandwidth and low latency inc…

• HBM
• Now
• High Bandwidth Memory (HBM)

This memory controller supports DDR2/3 SDRAM.

• DDR
• In Production
• Immediate

The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency.

• DDR
• In Production
• Immediate

This memory controller supports DDR3/4 SDRAM.

• DDR
• In Production
• Immediate
• JEDEC standards DDR4, DDR3

The High-Performance Memory Controller II SDRAM Intel FPGA IP core handles the complex aspects of using DDR, DDR2, and DDR3 SDRAM…

• DDR

The GDDR7 controller IP core is designed for use in applications requiring high memory throughput including artificial intelligen…

• GDDR
• Available on request
• Available

The Microtronix Avalon Mobile DDR SDRAM Memory Controller IP Core is designed for building high-performance Avalon-MM / Avalon-ST…

• DDR
• Available for immediate sale

The HBM2E memory controller IP is designed for use in applications requiring high memory throughput including performance-intensi…

• HBM

The Avalon Multi-port DDR2 Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in…

• DDR
• Available for immediate sale

The AXI EMC ( Microcontroller Bus Architecture (AMBA®) extensible Interface (AXI) External memory controller) provides the contro…

• DDR

The Xilinx Multi-Channel External Memory Controller (XPS MCH EMC) provides the control interface for external synchronous, asynch…

• DDR

MPMC is a fully parameterizable memory controller that supports SDRAM/DDR/DDR2 memory.

• DDR

This hardware IP core is a ZBT SRAM controller capable of automatically managing single address and full continuous burst read/wr…

• DDR
• Immediate
• ZBT SRAM

Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.

• DDR
• In volume production silicon
• Now
• DDR1, DDR2, DDR

Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.

• DDR

The Streaming Multi-port SDRAM Memory Controller IP Core provides a native RD or WR local port bus interface to SDRAM memory.

• DDR
• Over 5 years mature
• Available for immediate sale