Video Super Resolution Accelerator IP
Engineered specifically for AI‑driven super‑resolution algorithms, delivering exceptional computational efficiency
- Video Processing
- Now
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Video Super Resolution Accelerator IP
Engineered specifically for AI‑driven super‑resolution algorithms, delivering exceptional computational efficiency
Neoverse Compute Subsystems N2 (CSS N2)
Neoverse CSS N2: The Arm Neoverse N2 Platform, Delivered to Partners as a Verified, Performance-Validated Customizable Subsystem …
A CPU Foundation for the AI-Driven Datacenter The Arm Neoverse V3 CPU is built to deliver maximum performance for cloud applicati…
Optimal Performance and Power Efficiency for Hyperscale, Telecom, Networking, and Infrastructure Edge Devices The Arm Neoverse N3…
The I3C-T core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Target controller core suitable for any I3C b…
AVC/H.264 Video Encoder with Compressed Frame Store
The H264-E-CFS IP core is a video encoder supporting the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 standar…
The configurable and scalable Controller IP for PCI Express® (PCIe®) 6.x supports all required features of the PCI Express 6.x sp…
Our PSRAM solutions cover a range from 400Mbps to 1066Mbps, offering both normal-speed PSRAM digital IP and high-speed PSRAM mixe…
Perceptual Video Quality Optimization IP
Designed for AI-driven video pre-processing, ensuring quality optimization with low latency and real-time performance
The vendor provides designers with configurable USB4 Controller and Router IP.
10G-100G MACsec Security Module
Data security between Ethernet connected devices is expanding due to multiple factors: exponential growth of data containing sens…
Data security between Ethernet connected devices is expanding due to multiple factors: exponential growth of data containing sens…
UCIe-S PHY for Standard Package (x16) in SS SF5A, North/South Orientation
The UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale …
<4Gbps Low Power D2D Interface in TSMC 16nm & 28nm
A
Video Processing Unit (VPU) IP
High Number of Streams Decoder For Data Center
Hantro VC9800E enables up to 256 streams encoding with high video quality single-core solution, or multi-core solution, supportin…
112G LRM PHY, TSMC N5 x2, North/South (vertical) poly orientation
The Multi-Protocol 112G PHY IP is part of a high performance multi-rate transceiver portfolio for high-end networking and high pe…
32-bit RISC-V microcontroller.
64-bit RISC-V embedded core with in-order single issue pipeline
64-bit RISC-V embedded core with in-order single issue pipeline.
32-bit RISC-V embedded core with in-order single issue pipeline
32-bit RISC-V embedded core with in-order single issue pipeline.