USB4 Gen3 x2-lane PHY, TSMC N5, 1.2V, N/S orientation, type-C
The USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
Overview
The USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5.0 and UTMI+ specifications. The USB4 IP integrates high-speed mixed-signal circuits to support USB4 Gen3/Gen2/Gen1, USB 3.2 Gen2/Gen1 traffic. And could be backward compatible with USB 2.0/eUSB2 circuits. (480Mbps high-speed, 12Mbps full-speed, and 1.5Mbps low-speed data rates)
Key features
- Compliant to USB4 Gen3(20G) / Gen2(10G)
- Support USB4 Gen3 PIPE SerDes (128b/132b) coding
- Support USB4 Gen2 PIPE SerDes (64b/66b) coding
- Support PIPE USB3.2 Gen2 (128b/132b) coding
- Support PIPE USB3.2 Gen1 (8b/10b) coding
- Extra Sideband/CC Channel to manage the link.
- Support both host and device features with type-C connector
Block Diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 3nm | N3X | — |
Specifications
Identity
Provider
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Frequently asked questions about Single-Protocol PHY IP
What is USB4 Gen3 x2-lane PHY, TSMC N5, 1.2V, N/S orientation, type-C?
USB4 Gen3 x2-lane PHY, TSMC N5, 1.2V, N/S orientation, type-C is a Single-Protocol PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this Single-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.