Vendor: SmartDV Technologies Category: Single-Protocol PHY

LVDS Synthesizable Transactor

LVDS Synthesizable Transactor provides a smart way to verify the LVDS component of a SOC or a ASIC in Emulator or FPGA platform.

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Overview

LVDS Synthesizable Transactor provides a smart way to verify the LVDS component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's LVDS Synthesizable Transactor is fully compliant with standard LVDS Specification and provides the following features.

Key features

  • Follows LVDS Atmel-42415-WIRELESS-AT86RF215_Datasheet specification
  • Supports BBIC and RFIC Mode
  • Supports half duplex data transfer
  • Supports both data path transaction and SPI control interface transactions
  • Supports following IQ data path transaction
    • Supports TXD, RXD09 and RXD24
    • Supports 2bit I SYNC and Q SYNC data
    • Supports 14bit I data and Q data
    • Supports error injection
  • Supports following SPI control interface transaction
    • Supports 2bit command plus 14bit address and 8bit data control field format
    • Supports plane power consumption to negligible levels
    • Supports Master and Slave Mode
    • Supports baud rate selection
    • Supports single and burst transfer mode
  • Supports various kinds of errors as follows
    • I SYNC error
    • Q SYNC error
    • Invalid zero word error
    • Illegal write data error
    • Read only address error

Block Diagram

LVDS Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the LVDS testcases
  • Examples showing how to connect and usage of Synthesiable VIP
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation also contains User's Guide and Release notes

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
LVDS Transactor
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about Single-Protocol PHY IP

What is LVDS Synthesizable Transactor?

LVDS Synthesizable Transactor is a Single-Protocol PHY IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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