HDMI 2.1/DisplayPort 2.1 TX PHY in TSMC (N3E, N3P)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 speci…
- TSMC
- 3nm
- N3E
DisplayPort IP cores enable digital multimedia transport between processors, displays, cameras, and external devices in modern SoC and ASIC designs.
These IP cores support high-resolution digital display connectivity for monitors, graphics systems, and embedded visual platforms, helping designers build interoperable video and display pipelines across consumer, automotive, and industrial systems
This catalog allows you to compare DisplayPort IP cores from leading vendors based on throughput, feature set, power efficiency, and process node compatibility.
Whether you are designing graphics processors, display controllers, automotive cockpit displays, or industrial visualization, you can find the right DisplayPort IP for your application.
HDMI 2.1/DisplayPort 2.1 TX PHY in TSMC (N3E, N3P)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 speci…
The eDP 2.0 Verification IP provides an effective & efficient way to verify the components interfacing with the eDP interface of …
The DP/eDP IP is designed for transmitting or receiving video and audio signals between the video source devices and display devi…
Embedded Display Port Verification IP
Embedded Display port is the serial communication protocol developed by Video Electronics Standards Association to support the vi…
Display Port 2.0 Verification IP
Display port 2.0 is the serial communication protocol developed by Video Electronics Standards Association(VESA) to support the v…
Display port is the serial communication protocol developed by Video Electronics Standards Association to support the video,audio…
Display Port Synthesizable Transactor
Display port Synthesizable Transactor provides a smart way to verify the Display port version upto 2.0 component of a SOC or a AS…
eDP Transmitter core is compliant with standard eDP 1.4b specification.
eDP Receiver core is compliant with standard eDP 1.4b specification.
Display Port Transmitter core is compliant with Display Port version 2.0 specification.
Display Port Receiver core is compliant with Display Port version 2.0 specification.
The DisplayPort Verification IP provides an effective & efficient way to verify the components interfacing with the DisplayPort i…
The eDP 1.5 Verification IP provides an effective & efficient way to verify the components interfacing with the eDP interface of …
DisplayPort 2.1 Verification IP
The DisplayPort Verification IP provides an effective & efficient way to verify the DP components of an IP or SoC.
DisplayPort 2.0 Verification IP
The DisplayPort version 2.0 Verification IP provides an effective & efficient way to verify the components interfacing with the D…
eDisplayPort v1.4 Transmitter Controller IP Core
This eDisplayPort 1.4 Tx Controller IP Core integrates into any SoC or FPGA development, supporting the eDisplayPort 1.4b specifi…
eDisplayPort v1.4 Receiver Controller IP Core
This eDisplayPort 1.4 Rx Controller IP Core is a versatile and comprehensive solution designed for easy integration into any SoC …
Verification IP for DisplayPort/eDP/DSC/DPI
A comprehensive VIP solution for DisplayPort (DP) and eDP source and sink designs.
DisplayPort Transmit Controller ASIL Compliant
The USB-C 3.1/DisplayPort Tx 1.3 Tx IP solution consists of USB-C 3.1/DisplayPort 1.3 PHYs, USB-C 3.1/DisplayPort 1.3 controllers…
DisplayPort Transmit Controller
The USB-C 3.1/DisplayPort Tx 1.3 Tx IP solution consists of USB-C 3.1/DisplayPort 1.3 PHYs, USB-C 3.1/DisplayPort 1.3 controllers…