Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process Single Port SRAM (Introduce Redundancy feature to the existing FSD0A_B_SH).
- UMC
- 90nm
- SP
SRAM IP cores provide reusable on-chip storage structures for processors, controllers, and accelerators in modern SoC and ASIC designs.
These IP cores support fast on-chip volatile storage for caches, buffers, and tightly coupled memories, helping designers balance density, speed, power, and reliability in memory-centric subsystems
This catalog allows you to compare SRAM IP cores from leading vendors based on density, performance, power efficiency, and process node compatibility.
Whether you are designing processors, accelerators, embedded SoCs, or high-speed control systems, you can find the right SRAM IP for your application.
Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process Single Port SRAM (Introduce Redundancy feature to the existing FSD0A_B_SH).
Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm SP process
UMC 90nm SP/ Low-K Logic process Synchronous high density Single Port SRAM compiler With Redundancy.
Single Port SRAM Compiler IP, UMC 65nm LL process
UMC 65nm LL/RVT Low-K Logic process 1-port high density memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 65nm LL process
UMC 65nm LL/RVT Low-K process synchronous high density, Single Port SRAM compiler with the row redundancy.
Single Port SRAM Compiler IP, Support Repair Features, UMC 65nm SP process
UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM with redundaycy memory compiler.
Single Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process
UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler with row-pair redundancy.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process synchronous ultra high speed Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT+HVT Low-K Logic process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process synchronous Low Power (PG-DC) using 0.425-Bit cell Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler with redundancy.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.25um Logic process
UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um MS process
UMC 0.18um Mixed-Mode process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um CIS process
UMC 0.18um CMOS Image Sensor process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous High-density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Enhancement) Logic process synchronous high density Single Port SRAM memory compiler.
Dual Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Synchronous high density Dual Port SRAM memory compiler.
Dual Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Low-K Logic process Synchronouslow AC power Dual Port SRAM.