ECO Library IPs at GF 130BCD Process
IP
- GlobalFoundries
- 130nm
- BCD
ECO Library IPs at GF 130BCD Process
IP
General IO at GF 28SLP-HV Process
GPIO is a general-purpose input/output unit that provides basic input/output functionalities.
General IO at GF 130BCDLite2 Process
GPIO is a general-purpose input/output unit that provides basic input/output functionalities.
GLOBALFOUNDARIES 22nm FDSOI LVDS Transceiver Pad
The LVDS IO library provides IO cells for LVDS transmitter and receiver.
GLOBALFOUNDRIES 22nm High Density Single-Port SRAM Compiler
VeriSilicon GLOBALFOUNDRIES 22FDSOI Low Power Synchronous Single-Port SRAM compiler optimized for GLOBALFOUNDRIES FDSOI 22nm proc…
GLOBALFOUNDRIES 22nm Low Leakage Single-Port SRAM Compiler
VeriSilicon GLOBALFOUNDRIES 22FDSOI Low Power Synchronous Single-Port SRAM compiler optimized for GLOBALFOUNDRIES FDSOI 22nm proc…
GLOBALFOUNDRIES 22nm Low Power Single-Port SRAM Compiler
VeriSilicon GLOBALFOUNDRIES 22FDSOI Low Power Synchronous Single-Port SRAM compiler optimized for GLOBALFOUNDRIES FDSOI 22nm proc…
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of 1-Clock and 4-Data lanes.
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of Bi-directional 1-Clock a…
GLOBALFOUNDRIES 22nm FDX MIPI DPHY Slave V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes.
GLOBALFOUNDRIES 22nm FDX MIPI DPHY Master V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes.
General Purpose Comparator with programmable hysteretic mode.
Tunable Voltage Reference, 1.2V
1GHz tuning range, PN@1MHz offset =-109dBc/Hz, 1V regulated supply,Idd= 28mA
Reference Slicer, Differential to Single-Ended
Reference Slicer, Differential to Single-Ended, Idd=1mA, 122.88MHz with div By 2 Option, Floor Noise
RF Multiply by 2, 40GHz to 80GHz
RF Multiply by 2, 40GHz to 80GHz,VDD=800mV, Idd=5mA
RF Multiply by 2, 20GHz to 40GHz
RF Multiply by 2, 20GHz to 40GHz, Vdd=800mV, Idd=5mA
Noise @ 1MHz offset=12nV/Sqrt(Hz), IDD=640uA
Low-noise Regulator for VCO 1V to 0.8V
Noise @ 1MHz offset=2.5nV/Sqrt(Hz), IDD=12mA
Div-By-2 RF divider, Sub 20GHz, Idd=10mA@20GHz