UMC 55nm eHV Process Single Port SRAM Memory Compiler with Peripheral H/LVT using 277 bit-cell
UMC 55nm eHV Process Single Port SRAM Memory Compiler with Peripheral H/LVT using 277 bit-cell
- UMC
- 55nm
- HV
SRAM IP cores provide reusable on-chip storage structures for processors, controllers, and accelerators in modern SoC and ASIC designs.
These IP cores support fast on-chip volatile storage for caches, buffers, and tightly coupled memories, helping designers balance density, speed, power, and reliability in memory-centric subsystems
This catalog allows you to compare SRAM IP cores from leading vendors based on density, performance, power efficiency, and process node compatibility.
Whether you are designing processors, accelerators, embedded SoCs, or high-speed control systems, you can find the right SRAM IP for your application.
UMC 55nm eHV Process Single Port SRAM Memory Compiler with Peripheral H/LVT using 277 bit-cell
UMC 55nm eHV Process Single Port SRAM Memory Compiler with Peripheral H/LVT using 277 bit-cell
UMC 55nm LP process with PG Dual port SRAM compiler
UMC 55nm LP process with PG Dual port SRAM compiler
UMC 55nm Low-K/Low-Power Logic process synchronous ultra-high-speed single-port SRAM compiler.
UMC 55nm Low-K/Low-Power Logic process synchronous ultra-high-speed single-port SRAM compiler.
UMC 55nm SST/ulp Logic process standard synchronous high density single port SRAM memory compiler.
UMC 55nm SST/ulp Logic process standard synchronous high density single port SRAM memory compiler.
UMC 55nm eflash/ulp process standard synchronous high density single port SRAM memory compiler.
UMC 55nm eflash/ulp process standard synchronous high density single port SRAM memory compiler.
UMC 55nm SST process standard synchronous high density single port SRAM memory compiler.
UMC 55nm SST process standard synchronous high density single port SRAM memory compiler.
55nm eFlash Dual-Port SRAM memory compiler with row redundancy
55nm eFlash Dual-Port SRAM memory compiler with row redundancy
UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler
UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler
UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy
UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy
UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler
UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler
UMC 55nm EFLASH Processy Single-Port SRAM with row repair Memory complier
UMC 55nm EFLASH Processy Single-Port SRAM with row repair Memory complier
UMC 55nm eFlash Single-Port SRAM memory compiler
UMC 55nm eFlash Single-Port SRAM memory compiler
55 SP Dual Port SRAM compiler with 1P4M metal option
55 SP Dual Port SRAM compiler with 1P4M metal option
UMC 90nm SPLVT ultra-high speed 1-port SRAM
UMC 90nm SPLVT ultra-high speed 1-port SRAM
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler
VeriSilicon SMSB 0.18um Ultra-Low-Leakage(ULL) Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor …
UMC 28nm HPC Process dual port SRAM with power gating
UMC 28nm HPC Process dual port SRAM with power gating
UMC 28nm HPC process PG Dual Port SRAM with LVT
UMC 28nm HPC process PG Dual Port SRAM with LVT
UMC 28nm HPC process PG-Dual Port SRAM with LVT
UMC 28nm HPC process PG-Dual Port SRAM with LVT
UMC 28nm HPC process Dual Port SRAM with Power gating
UMC 28nm HPC process Dual Port SRAM with Power gating