USB2.0 Dual-Role PHY, TSMC N7, N/S orientation, type-C (ASIL-B)
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…
Overview
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power consumption. M31 utilizes a whole new design architecture to implement the USB 2.0 IP without sacrificing the performance associated with USB 2.0. The USB 2.0 IP is not only suitable for USB peripherals, but also an optimized solution for SOCs that desire multiple USB ports.
Key features
- Smallest USB 2.0 PHY IP worldwide (IP size of 55nm, 40nm, 28nm, and 16/12nm are less than 0.2mm2)
- Fully compliant with Universal Serial Bus (USB) 2.0 electrical specification
- Compliant with UTMI+ specifications (High-Speed, Full-Speed, and Low-Speed functions)
- Supports clock inputs from 10/12/19.2/24/25/27/30/40MHz crystal oscillator or external clock source
- Integrated PLL to provide a variety of stand-alone clock outputs for USB related applications
Block Diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 6nm | N6 | — |
Specifications
Identity
Provider
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Frequently asked questions about Single-Protocol PHY IP
What is USB2.0 Dual-Role PHY, TSMC N7, N/S orientation, type-C (ASIL-B)?
USB2.0 Dual-Role PHY, TSMC N7, N/S orientation, type-C (ASIL-B) is a Single-Protocol PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this Single-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.