The Embedded DisplayPort (eDP) 1.3 Transmitter PHY is a high-performance interface IP designed to enable the transmission of video and audio signals in embedded applications. Optimized for use in devices such as laptops, tablets, all-in-one PCs, and high-resolution displays, the eDP 1.3 Transmitter delivers exceptional video quality and power efficiency, ensuring a superior user experience for modern multimedia applications.
eDP 1.3 Transmitter PHY
Overview
Key Features
- Fully compliant to VESA Embedded DisplayPort 1.3 specifications
- Support Embedded DisplayPort RBR, HBR, and HBR2 data rate and customized data rate
- Configurable x1/x2/x4 Main-Link data lanes
- PIPE SerDes Mode interface to Embedded DisplayPort controller
- Main link transmitter supports eDP pre-emphasis feature
- Supports three PIPE data width options: 10-bit, 20-bit and 40-bit
- Built-in scrambling and ANSI 8b/10b encoding blocks
- PLL support SSC function
Technical Specifications
Short description
eDP 1.3 Transmitter PHY
Vendor
Vendor Name
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