Vendor: InPsy Category: Single-Protocol PHY

eDP 1.3 Transmitter PHY

The Embedded DisplayPort (eDP) 1.3 Transmitter PHY is a high-performance interface IP designed to enable the transmission of vide…

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Overview

The Embedded DisplayPort (eDP) 1.3 Transmitter PHY is a high-performance interface IP designed to enable the transmission of video and audio signals in embedded applications. Optimized for use in devices such as laptops, tablets, all-in-one PCs, and high-resolution displays, the eDP 1.3 Transmitter delivers exceptional video quality and power efficiency, ensuring a superior user experience for modern multimedia applications.

Key features

  • Fully compliant to VESA Embedded DisplayPort 1.3 specifications
  • Support Embedded DisplayPort RBR, HBR, and HBR2 data rate and customized data rate
  • Configurable x1/x2/x4 Main-Link data lanes
  • PIPE SerDes Mode interface to Embedded DisplayPort controller
  • Main link transmitter supports eDP pre-emphasis feature
  • Supports three PIPE data width options: 10-bit, 20-bit and 40-bit
  • Built-in scrambling and ANSI 8b/10b encoding blocks
  • PLL support SSC function

Files

Product Sheet Download

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Specifications

Identity

Part Number
eDP 1.3 Transmitter PHY
Vendor
InPsy

Provider

InPsy
HQ: Taiwan (R.O.C.)
InPsy was founded in September 2019 with a vision to empower customer innovation with cutting-edge semiconductor interconnect IP solutions. Through seamless collaboration with major global wafer foundries, chip design houses and strategic partners, InPsy has demonstrated its mass production proven track record of IP technology firsts on the most advanced technology nodes. Ultimately, our mission is to be the leading provider of innovative silicon IP solutions, recognized globally for our unmatched customer satisfaction, exceptional quality, and technical excellence. Think of us as your outsourced, in-house IP design team
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Learn more about Single-Protocol PHY IP core

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Frequently asked questions about Single-Protocol PHY IP

What is eDP 1.3 Transmitter PHY?

eDP 1.3 Transmitter PHY is a Single-Protocol PHY IP core from InPsy listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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