Vendor: Roa Logic BV Category: Channel Coding

8b/10 Decoder

The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium.

Contact Provider Request Datasheet

Overview

The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium. It ensures enough state transitions to allow the use of a Clock Recovery unit. Thus both data and clock are encoded in the serial data stream.

The RoaLogic 8b10b decoder is a full implementation of the 8b10b scheme described by Widmer and Franaszek, as used by many high-speed protocols. The decoder takes 10bit symbols and decodes them into 8bit data while simultaneously checking for bit errors. The core detects the special comma symbols and automatically detects K28.5.

Two cores can be cascaded to support 16b20b decoding.

Key features

  • 8b10b decoding
  • Can be cascaded for 16b20b decoding
  • Supports industry standard comma “K” symbols
  • Pipelined design
  • Low latency
  • Fully synthesizable
  • Target technology independent

Block Diagram

8b/10 Decoder block diagram

Specifications

Identity

Part Number
8b/10 Decoder
Vendor
Roa Logic BV
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Roa Logic BV
HQ: The Netherlands
Roa Logic BV specialises in the development of Intellectual Property Cores for FPGA and ASIC, with a strong focus on the embedded market. It provides the IP required to build a complete embedded solution, including processors, peripherals, memory, and interfaces.
Contact Roa Logic BV

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

Audio Transport in DisplayPort VIP

DisplayPort uses Secondary Data Packets (SDPs), which are transported over the Main-Link that are not main video stream data. This allows it to carry audio and video simultaneously. The VIP supports audio transmission both in the original mode as defined in the specification as well as just as any other SDP being transmitted.

Frequently asked questions about Channel Coding IP cores

What is 8b/10 Decoder?

8b/10 Decoder is a Channel Coding IP core from Roa Logic BV listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP