OSC
- Oscillator
- proven
- immediate
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
OSC
8MHz clock output Frequency deviation: -3% ~ +3%, @ -40°C~125°C (after trimming) Frequency deviation: -2% ~ +2%, @-20°C~85°C (aft…
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Temperature Range:-40°C~125°C Voltage at 25°C:1.43V Sensor Gain: 4.3mV/°C Class AB output 0.053 mm2
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Low power 10bit 400Ksps R2RDAC
IP
Ultra-low power 12bit 1Msps SARADC
IP
24bit High Performance Audio DAC
IP
Static current is low to 700nA; Typical POR delay time is about 1.9ms;0.0143mm2
3.3V-->1.5V capacitor-free LDO
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3.3V-->1.5V ultra-low power LDO
IP
Power on Reset IP, Input: 3.3V, UMC 0.5um process
Vrr=2.3V without Vfr, VCC=3.3V, Ivcc=17uA, L type IO, Power On Reset, UMC 0.5um Logic process low voltage.
Power on Reset IP, Input: 3.3V, UMC 0.5um process
Vrr=2.3V without Vfr, VCC=3.3V, Ivcc=17uA, B type IO, Power On Reset, UMC 0.5um Logic process.
Power on Reset IP, Input: 5V, UMC 0.5um process
Vrr=3.4V Vfr=3.0V, VCC=5V, Ivcc=17uA, B type IO, Power On Reset, UMC 0.5um Logic process.
Voltage Detector IP, Vdet: 3.3V, UMC 0.5um process
5V/3.3V detector VDT, UMC 0.5um Logic process.