1.0~3.6V input, loading 20mA, 0.9V output with VBG=0.75V Linear Regulator, UMC 55nm ULP/UHVT Low-K Logic Process
- UMC
- 55nm
- ULP
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
1.0~3.6V input, loading 20mA, 0.9V output with VBG=0.75V Linear Regulator, UMC 55nm ULP/UHVT Low-K Logic Process
Input 1.0V-3.6V, VBG=0.75V, Band Gap, UMC 55nm ULP Low-K Logic process
Power on Reset IP, Input: 3.3V, Vrr=2.81V, Vfr=2.81V, UMC 55nm SP process
Vrr=2.81V Vfr=2.81V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset,special request, UMC 55nm SP/RVT LowK Logic Process
A/D Converter IP, 10 bits, 54Msps, Pipelined, Single-end Input, UMC 55nm SP process
1.0V/3.3V 10Bits 54MSPS Single-end Input Pipelined ADC, UMC 55nm SP, LowK, Logic Process
Ring Oscillator IP, Output: 32KHz, UMC 55nm LP process
Internal-RC and Built-in Bandgap, trimmable fixed frequency 80MHz with trimming pad.
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.11um HS/FSG process
10bit 1MSPS SAR ADC with 8-to-1 Mux , UMC 0.11um HS/FSG Logic Process
M31 Digital PLL IP in 3nm, 5nm, 6nm, 7nm, 12nm, 16nm, 22nm,28nm,40nm
M31 Digital PLL is a core-power only programmable phase-locked loop (PLL) for frequency synthesis.
SMIC 55nm LL 32KHz clock oscillator with low power consumption
IP
SMIC 55nm LL 32KHz clock oscillator
IP
Voltage Detector IP, Vdet: 2.8V, UMC 0.25um process
Vdet=2.8V Vhys=0.1V, VCCA=3.3V, Ivcca=30uA, UMC 0.25um Logic process.
Voltage Detector IP, Vdet: 2.4V, UMC 0.18um G2 process
Vdet=2.4V, Vhys=0.1V, VCCA=3.3V, Ivcca=35uA, UMC 0.18um GII Logic process.
Voltage Detector IP, Vdet: 2.1V, UMC 0.25um process
Vdet=2.1V Vhys=0.1V, VCCA=2.5V, Ivcca=27uA, UMC 0.25um Logic process.
Voltage Detector IP, Vdet: 0.8V / 2.0V / 4.0V / 4.4V, UMC 0.18um G2 process
Voltage detector IP, UMC 0.18um LL Logic process.
Voltage Detector IP, 4 Levels, UMC 0.13um HS/FSG process
4-level voltage detector for USB_OTG, UMC 0.13um HS/FSG Logic process.
Ring Oscillator IP, Output: 8KHz, UMC 0.11um HS/AE process
Self-contained ring oscillator, frequency 8KHz.
Ring Oscillator IP, Output: 32KHz, UMC 0.11um eFlash/LL process
Self-contained ring oscillator, frequency 32KHz.
RC Oscillator IP, RC-Oscillator, Output: 32KHz, UMC 0.13um HS/AE process
Internal-R, trimmable fixed frequency 70MHz.
RC Oscillator IP, Output: 40MHz, UMC 0.18um G2 process
Internal-RC, frequency 40MHz.
RC Oscillator IP, Output: 30MHz, UMC 0.25um process
Internal-RC, trimmable frequency 30MHz, VCCA=2.0V~3.0V VBG=1.23V, UMC 0.25um Logic process.
RC Oscillator IP, Output: 25KHz/33MHz, UMC 0.18um G2 process
Internal-RC, trimmable frequency selected 25 KHz/33MHz, VCCA=1.2V~1.8V, VBG=0.615, UMC 0.18um GII Logic process.