DDR DLL IP, Input: 80MHz - 320MHz, Output: 6.25%-50% Delay, UMC 55nm SP process
Input 80-320MHz, output 6.25%~50% delay, 80-320MHz, DDR2 DLL, UMC 55nm SP/RVT Low-K Logic process.
- UMC
- 55nm
- SP
Clocking and timing IP cores are fundamental to semiconductor designs that require accurate clock generation, distribution, synchronization, and timing control. This category includes PLLs, DLLs, oscillators, and clock generators used in SoCs, ASICs, SerDes subsystems, processors, memory interfaces, and communication devices.
Browse clocking and timing IP from multiple vendors to compare jitter, frequency range, locking behavior, power consumption, programmability, and process support. Semi IP Hub helps chip architects and design engineers identify the right timing IP for high-performance and low-power silicon platforms.
DDR DLL IP, Input: 80MHz - 320MHz, Output: 6.25%-50% Delay, UMC 55nm SP process
Input 80-320MHz, output 6.25%~50% delay, 80-320MHz, DDR2 DLL, UMC 55nm SP/RVT Low-K Logic process.
DDR DLL IP, Input: 66MHz - 133MHz, Output: 66MHz - 133MHz, UMC 0.13um HS/FSG process
Input 66M-133MHz, output 66M-133MHz, DDR DLL, UMC 0.13um HS/FSG Logic process.
It is a UMC 0.13um HS DLL-based cell that generates three-channel DQS with 13.5% ~ 36.6% timing delay for DDR2 SDRAM controller u…
UMC 0.13um HS/FSG process DLL-based cell that generates fouRchannel DQS with 13.5% ~ 36.6% timing delay for DDR1 SDRAM controller…
DDR DLL IP, 200MHz - 400MHz, Output: 25% Delay, UMC 0.11um HS/AE process
DLL-based cell that generates two-channel DQS with 25% timing delay for DDR2 SDRAM controller usage, UMC 0.11um HS/AE (AL Enhance…
This IP is a programmable Analog PLL suitable for high speed clock generation.
GSMC 0.18um 1.8v Ring Oscillator
The present IP is a Ring Oscillator.
This IP is a programmable Analog PLL suitable for high speed clock generation.
This PLL is designed for audio clock generation.
SMIC 0.11um 32KHz Crystal Oscillator
Process: SMIC 0.11um Logic 1P8M 1.2V/3.3V CMOS process Operating voltage range: VCC_XO: 1.62~3.6V Operating temperature range: -4…
2000 to 2800 MHz Phase Locked Loop
IP
PLL - Input 8~24MHz, output 12~48MHz
IP
PLL - Input 4~27MHz, output 96~288MHz
IP
PLL - Input 4~24MHz, output 540~756MHz
IP
PLL - Input 27MHz, output 504~756MHz
IP
RC Oscillator - 15KHz RC oscillator
IP
Crystal Oscillator - 32.768KHz crystal oscillator
32.768KHz crystal oscillator
RC Oscillator IP, Output: 10MHz, UMC 90nm LL process
Internal-RC, trimmable fixed frequency 10MHz.
Input 25M-500MHz, output 1000M-1500MHz, frequency synthesizable PLL, UMC 65nm SP/RVT process.
RC Oscillator IP, Output: 12KHz, UMC 65nm LL process
Internal-RC, trimmable fixed frequency 12KHz.