Vendor: Truechip Solutions Category: Coherency

AMBA 5 CHI Verification IP

The AMBA5 CHI Verification IP provides an effective & efficient way to verify the components interfacing with AMBA 5 CHI bus of a…

Overview

The AMBA5 CHI Verification IP provides an effective & efficient way to verify the components interfacing with AMBA 5 CHI bus of an IP or SoC. The AMBA5 CHI VIP is fully compliant with standard AMBA5 CHI specifications from ARM. This VIP is a lightweight VIP with an easy plug-and-play interface so that there is no hit on the design cycle time.

Key features

  • VIP is Compliant with the latest ARM™ AMBA5 CHI.
  • Support any type of network topology like Crossbar, Ring, Mesh, etc…
  • Support for all types of AMBA5 CHI Nodes:
    • Requester (RN-F, RN-D, RN-I)
    • Home (HN-F, HN-I)
    • Subordinate (SN-F, SN-I)
  • Support DMT, DWT, and DCT.
  • Support all types of transaction identifiers
  • GUI for easy analyzing packet debugging and decoding
  • All types of protocol, and link layer attributes are visible in packet & flit format.
  • Strong protocol checking Bus Monitor which also provides statistics ofthe transactions
  • Parameterized Flit data
  • All types of ordering modes, Request Retry are supported
  • Each cache line states , Request type, Response type, Snoop request & snoop response are supported
  • Exclusive, Cache stashing
  • DVM operation with address translation supported
  • Support REM features
  • Support Memory tagging, MPAM, PBHA.
  • Support Persistent and deep Persistent
  • Support Link activation & deactivation, protocol layer activation & deactivation.
  • Support Requester coherency request & acknowledge.
  • Support data poison & check_type
  • Support Critical chunk first wrap order

Block Diagram

Benefits

  • Available in native System Verilog (UVM/OVM/ VMM) and Verilog
  • Unique development methodology to ensure the highest levels of quality
  • Availability of Compliance & Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and coverage points with connectivity examples for all the components
  • Consistency of interface, installation, operation, and documentation across all our VIPs
  • Provide complete solutions and easy integration in IP and SoC environment

What’s Included?

  • AMBA5 CHI Requester/Home/Subordinate Node Agent
  • AMBA5 CHI Bus Monitor and Scoreboard
  • AMBA5 CHI NOC Scoreboard
  • Test Environment & Test Suite :
    • Basic and Directed Protocol Tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
  • Integration Guide, User Manual, and Release Notes

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
AMBA 5 CHI Verification IP
Vendor
Truechip Solutions

Provider

Truechip Solutions
HQ: USA
Truechip is a leading provider of Design and Verification solutions – which help you to accelerate your design, lowering the cost and the risks associated in the development of your ASIC, FPGA and SoC. Truechip is a privately held company, with a global footprint and with a strong and experienced leadership team. Truechip was established in 2008 with a Mission to:
  • To create world class Verification IP Solutions
  • To provide expert consultancy to ASIC & SoC Design companies
  • To design SOCs from Architecture to Working Silicon
Our Vision is to:
  • To be the leading provider of Semiconductor IP Solutions
  • To be a one-stop-shop for Design and Verification
Our Guiding Principles are:
  • Customer Success
  • Commitment to Quality
    • Quality of Products
    • Quality of Engineers
  • Best in class Customer Support
  • Ethics and Integrity
We at Truechip leverage the extensive domain knowledge and expertise from current associations to provide complete set of design and verification solutions to our customers.

Learn more about Coherency IP core

SoC design: When a network-on-chip meets cache coherency

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To understand the issues at hand, it’s first necessary to understand the role of cache in the memory hierarchy.

Co-Designed Cache Coherency Architecture for Embedded Multicore Systems

In this paper, we present the round-robin method applied to baseline coherency protocol and initial analysis of one hybrid protocol that performs speculative requests when access patterns are detected. We also propose to manage patterns through a dedicated hardware component attached to each core of the processor.

Frequently asked questions about Coherency Interconnect IP cores

What is AMBA 5 CHI Verification IP?

AMBA 5 CHI Verification IP is a Coherency IP core from Truechip Solutions listed on Semi IP Hub.

How should engineers evaluate this Coherency?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Coherency IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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