Vendor: FortifyIQ, Inc. Category: Symmetric Crypto

AES-SX Secure Core - Balanced AES Core with Multi-Mode Support and Advanced SCA/FI Protection

Balanced AES Core with Multi-Mode Support and SCA/FI Protection FortifyIQ’s Balanced AES IP core is a compact yet capable cryptog…

Overview

Balanced AES Core with Multi-Mode Support and Advanced SCA/FI Protection

FortifyIQ’s Balanced AES IP core is a compact yet capable cryptographic accelerator designed for embedded systems with moderate performance and resource requirements. Supporting AES-128/256 encryption and decryption in all standard modes, including ECB, CBC, and CTR  (excluding GCM and XTS), the core delivers flexible and efficient data protection. Built on a four-S-box architecture for improved throughput, it features robust side-channel and fault-injection countermeasures, based on the innovative RAMBAM protection scheme. Applied at the RTL level and validated by a Common Criteria accredited lab, the core is silicon-proven and ready for use in applications targeting FIPS 140-3 and Common Criteria certification. Ideal for secure boot, encrypted storage, and communication protocols in balanced embedded devices.

Key features

  • Efficient Performance
  • SCA/FIA Protections, DFA optional 
  • Flexible Interfaces
  • Security Certification Readiness

Applications

  • IoT Devices
  • Automotive Systems
  • Embedded and Industrial Control
  • Authentication Tokens
  • Payment Systems

What’s Included?

  • SystemVerilog source code or netlist
  • Testbench, input vectors, and expected results
  • Sample timing constraints, synthesis, and simulation scripts
  • Hardware Abstraction Layer (HAL) reference implementation
  • Integration, configuration, and usage manuals
  • Software library 
  • Security documentation

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
FIQ-AES02B
Vendor
FortifyIQ, Inc.

Provider

FortifyIQ, Inc.
HQ: USA
FortifyIQ develops HW security IP cores fortified against Side-Channel (SCA) and Fault Injection attacks (FIA), while preserving the original AES goals of speed, low latency, and low power usage. We also offer high-performance software libraries and EDA tools for pre- and post-silicon security assessment. Our core protection algorithm was tested rigorously, passing the Test Vector Leakage Assessment (TVLA) test at 1 billion traces, and was certified by a third-party Common Criteria lab. Our cores are fully synthesizable, eliminating the need for custom cells or special place & route handling. Being algorithm-based, they are technology-agnostic, ensuring compatibility and security across diverse platforms and devices. Secure IP Cores and SW libraries FortiCrypt: Our Advanced AES IP cores provide robust protection against SCA, FIA, (including Differential Power Analysis-DPA, and Statistically Ineffective Fault Attacks-SIFA), alongside high performance, low latency, low gate count, and low power usage. Purely mathematically-driven, these cores achieve a high maximum frequency, and one clock cycle per AES round. Our FortiCrypt high-performance software library can be used to protect security vulnerabilities in HW in unprotected field devices even though they are already deployed, by a simple software download. They are based on the same security proven algorithm (STORM) as our ultra-low power IP cores, and are silicon proven. They have extremely high performance. Even on a low-end 1.1 GHz ARM processor the performance is high enough for Ultra HD (3840×2160) video streaming. FortiMac: These HMAC SHA2 cores provide robust protection against SCA, DPA, FIA, and SIFA, are suitable for lightweight applications and are purely algorithmic and thus implementation-agnostic. Our products, including the software library, offer protection of HMAC SHA2, based on the threshold implementation approach, validated analytically and on physical devices. FortiPKA-RISC-V: A Public Key Algorithm coprocessor with modular multiplication and SCA and FIA protection that streamlines operations by eliminating Montgomery domain transformations, enhancing the coprocessor's performance and reducing area. FortiPKEx: A low-cost key exchanger for companies currently using preinstalled symmetric keys due to cost constraints, but are considering shifting to key exchange protocols based on asymmetric cryptography with built-in resistance to SCA and FIA. EDA Tools: Comprehensive pre-silicon and post-silicon security assessment tools, including TVLA charts that pinpoint vulnerabilities down to specific modules and gates, greatly simplifying security debugging against a spectrum of physical attacks, including SCA, DPA, FIA, and SIFA. This effectively moves the security assessment to the same stage as the functional assessment. These tools were instrumental in developing all our secure IP cores and software libraries.

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Frequently asked questions about Symmetric Cryptography IP cores

What is AES-SX Secure Core - Balanced AES Core with Multi-Mode Support and Advanced SCA/FI Protection?

AES-SX Secure Core - Balanced AES Core with Multi-Mode Support and Advanced SCA/FI Protection is a Symmetric Crypto IP core from FortifyIQ, Inc. listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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