Semiconductor IP Articles Archive - Page 229 of 229

SoCs: Supporting Socketization -> Decouple core for proper integration

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January 3, 2000

SoCs: Supporting Socketization -> Ready, set, reuse: A socketization primer

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January 3, 2000

SoCs: Supporting Socketization -> Reuse goal : fast tapeouts

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January 3, 2000

SoCs: Supporting Socketization -> Socketization process stocks design-reuse store

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January 3, 2000

SoCs: Supporting Socketization -> Socketization gets to core of plug-and-play IP

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January 3, 2000

Co-Design for SOCs -> On-chip support needed for SOC debug

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June 14, 1999

Co-Design for SOCs -> Fresh test strategies needed for IP cores

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June 14, 1999

Co-Design for SOCs -> Threads provide speed and flexibility

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June 14, 1999

Co-Design for SOCs -> Cycle-accurate model speeds design

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June 14, 1999

Co-Design for SOCs -> System models replace hard prototypes

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June 14, 1999

Co-Design for SOCs -> Minimizing risks with co-verification

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June 14, 1999

Co-Design for SOCs -> Executable models key to flexible design

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June 14, 1999

Co-Design for SOCs -> Iterated co-design right for system ICs

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June 14, 1999

Co-Design for SOCs -> Embedded SOC takes new codesign tricks

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June 14, 1999

Co-Design for SOCs -> Blend of tools needed for verification

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June 14, 1999

Co-Design for SOCs -> Designers face chip-level squeeze

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June 14, 1999

Co-Design for SOCs -> 'Ramping-up' for complex multiprocessing applications

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June 14, 1999

Co-Design for SOCs -> Software debug shifts to forefront of design cycle

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June 14, 1999

SamurAI: a 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15,000x Peak-to- Idle Power Reduction, 207ns Wake-up Time and 1.3TOPS/W ML Efficiency

By Ivan Miro-Panades, CEA

June 22, 1998