TSMC shuns high-NA EUV lithography
By Peter Clarke, eeNews Europe | April 29, 2025
The company introduced the A14 process at the symposium saying it is expected to enter production in 2028. It has previously been stated that an A16 process due to appear late 2026 and that too does not require a high-NA EUVL tool.
To read the full article, click here
Related Semiconductor IP
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 12nm FFC
- Ultra-Low Latency 32Gbps SerDes IP in TSMC 22nm ULP
- 32Gbps SerDes IP in TSMC 12nm FFC
- 32Gbps SerDes IP in TSMC 22nm ULP
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
Related News
- TSMC Says Immersion Lithography Nearly Production Ready
- MAPPER and TSMC Take Next Step in Exploring Multiple E-beam Lithography for IC Manufacturing at 22 nanometer node and Beyond
- IMEC presents functional 22nm SRAM cells fabricated using EUV technology
- Synopsys and TSMC Deliver Accurate Lithography Verification for 28nm Designs
Latest News
- Imec unlocks fourfold UWB range extension using world-first narrowband receiver chip compliant with IEEE 802.15.4ab standard
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology