SoC-e Announces New Release of Managed Ethernet Switch (MES) IP Core Supporting DLR for Ethernet/IP
January 24, 2018 -- Device Level Ring (DLR) is a Layer-2 protocol that provides media redundancy in a ring topology. The DLR protocol is intended primarily for implementation in Ethernet/IP end-devices that have two Ethernet ports and embedded switch technology. The DLR protocol provides fast network fault detection and reconfiguration in order to support the most demanding control applications.
A DLR network includes at least one node configured to be a Ring Supervisor, and any number of Beacon Based Nodes. It is assumed that all the ring nodes have at least two Ethernet ports and incorporate embedded switch technology.
The new realease of SoC-e’s MES IP Core (Managed Ethernet Switch) fully supports DLR protocol. The IP Core allows to implement a DLR end-device, with embedded switching capabilities and supports multiple Ethernet interfaces. The following network node configurations can be implemented with the MES IP Core:
- Ring Supervisor Node
- Beacon Based Node

Related Semiconductor IP
- 10M/100M/1G Managed Ethernet Switch IP Core
- 10M/100M/1G/10G Managed/Unmanaged (TSN) Ethernet Switch IP Core
- 10M/100M/1G Managed Redundant Switch IP Core
- 10M/100M/1G Multiport TSN Ethernet Switch IP Core
- Configuration-over-Ethernet (COE) IP Core
Related News
- SoC-e's Managed Ethernet Switch now supports up-to 32 ports
- Fraunhofer IPMS develops new 10G TSN endpoint IP Core for deterministic high-speed Ethernet networks
- CAST Introduces MAC-SEC-MG IP Core for Secure 10G+ Ethernet SoC Designs
- SOC-E and SafeCore Devices to unveil a new TSN End Point IP Core: AeroTSN-EP
Latest News
- SignatureIP Unveils MesoLink, a Mesochronous Bridge for PCIe/CXL Validation
- ICTK Partners with Jiran Security to Drive Post-Quantum Cryptography (PQC) Migration
- S2C Named Andes Technology’s 2026 Partner of the Year
- BrainChip Launches AKD1500 PCIe Card For Edge AI Evaluation Everywhere
- TDK-Micronas adopts Aniah’s AI-powered OneCheck® platform to advance automotive semiconductor development