Expert I/O offers system verification component for Serial ATA
Dylan McGrath, EE Times
(03/17/2006 1:55 PM EST)
SAN FRANCISCO — Design and verification service provider Expert I/O is now offering a system verification component (SVC) specifically designed for thorough verification of Serial ATA port multipliers, port selector ASICs and FPGAs using both random and directed simulation.
According to Expert I/O (Simi Valley, Calif.), the component, SATA PM/PS SVC, is constructed using a layered approach so that each layer interface can be used to speed up construction of directed tests. The SVC supports constrained randomization parameters throughout the layers to aid in coverage during randomized testing, according to the company.
(03/17/2006 1:55 PM EST)
SAN FRANCISCO — Design and verification service provider Expert I/O is now offering a system verification component (SVC) specifically designed for thorough verification of Serial ATA port multipliers, port selector ASICs and FPGAs using both random and directed simulation.
According to Expert I/O (Simi Valley, Calif.), the component, SATA PM/PS SVC, is constructed using a layered approach so that each layer interface can be used to speed up construction of directed tests. The SVC supports constrained randomization parameters throughout the layers to aid in coverage during randomized testing, according to the company.
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