eMemory Recognized with TSMC Open Innovation Platform® (OIP) Partner of the Year Award for IP Solutions

Hsinchu, Taiwan -- September 29, 2026 -- eMemory Technology Inc., the world’s leading provider of embedded non-volatile memory (eNVM), has been named a TSMC Open Innovation Platform® (OIP) Partner of the Year for the 17th year in-a-row. Building on the foundation of production-proven IP for TSMC N7 through N3 technologies, eMemory’s NeoFuse OTP has initiated development of its IP on N2 technology. NeoFuse also plays important roles in AI and HPC silicon, from calibrating parameters and repairing memories to improve yield and reliability, to serving as the storage layer of the hardware root-of-trust, holding unique IDs and keys.

eMemory has built a solid record of collaboration on TSMC’s advanced processes: NeoFuse OTP is in stable production on TSMC’s N7 and N6, and has secured design wins across N5, N4, and N3 process nodes. eMemory has also completed new testchip tape-outs on N3C and N2P and continues to align with TSMC’s technology roadmap in advancing its IP development for N2 and the generations that follow. To date, more than 840 eMemory silicon IPs have been deployed on TSMC’s process technologies.

eMemory’s IP is used across a wide range of end markets, and AI and HPC silicon is one of the more popular markets where NeoFuse OTPs are being applied today. The OTP macro carries several tasks on the die: storing boot code patches to shortening time to market, supporting repair of high-density on-die SRAM, holding PVT sensor trim codes for multi-core designs, and serving as the storage layer of the hardware root-of-trust, supplying the unique ID, secure storage, and entropy source that Caliptra requires. In heterogeneous packages, that same anchor extends identity to every die. As physical AI pushes computation into edge devices and physical systems, demand for chip identity and secure storage rises with it, and a number of customers have adopted eMemory’s IP in AI chip designs.

“What drives our next generation of IP is demand from the market and from applications,” said Dr. Charles Hsu, Chairman of eMemory. “This year two drivers stood out: advanced computing platforms on N2, and the need to establish a hardware-level root-of-trust for every die in a multi-die package. Turning those demands into silicon takes a manufacturing partner willing to move forward with you, and the OIP ecosystem is where that work gets proven.”

Explore eMemory IP:

• Embedded OTP (One-Time Programmable) IP, 4Kx32 bits for 0.75V/1.8V FF
• Embedded OTP (One-Time Programmable) IP, 512x39 bits for 0.75V/1.8V FF
• Embedded OTP (One-Time Programmable) IP, 2Kx32 bits for 0.75V/1.8V FF
• Embedded OTP (One-Time Programmable) IP, 8Kx32 bits for 0.8V/1.8V FFC