Creonic Introduces FEC IP Core Solution for SDA Free-Space Optical OCT V3.0 Standard
Kaiserslautern -- April 27, 2023 – Creonic GmbH, the leading provider of IP cores for satellite communications, today revealed its latest solution for free-space optical (FSO) communications with immediate availability. The Space Development Agency (SDA) introduced the Optical Communications Terminal (OCT) Standard V3.0 with the intention to enable interoperability between optical communication terminals where at least one endpoint is space-based. It targets space-to-space (S2S), space-to-air (S2A), space-to-maritime (S2M), and space-to-ground (S2G) applications.
The Creonic SDA OCT V3.0 Encoder is designed to generate Over-The-Air (OTA) frames in accordance with the OCT standard. These frames consist of a preamble, followed by a header and payload data, both of which are protected with a cyclic redundancy check (CRC) and forward error correction (FEC). A convolutional code protects the header while an LDPC code handles the payload data. The Creonic SDA OCT V3.0 Decoder performs the synchronization of the OTA frame and eventually processes the header with a Viterbi decoder and the payload data with an LDPC decoder.
Both IP cores handle the required coded throughput of 2.5 Gbit/s and support code rates of 0.5, 0.67, 0.76, and 0.85 as well as the transmission of uncoded data. They are equipped with easy-to-use AXI4-Stream data and configuration interfaces for seamless integration. For LDPC coding, the encoder and decoder leverage the SD-FEC hard IP cores available on select AMD Xilinx Zynq UltraScale+ RFSoC devices. Additionally, FPGAs with a more favorable price-point can be supported by using Creonic’s soft LDPC encoder / decoder IP core solutions. Support for Intel FPGAs is available on request.
About Creonic GmbH
Creonic is an ISO 9001:2015 certified provider of ready-for-use IP cores for wired, wireless, fiber, and freespace optical communications.
All relevant digital signal processing algorithms are covered, including, but not limited to, forward error correction, modulation, equalization, and demodulation.
The company offers the richest product portfolio in this field, covering standards like 3GPP 5G, DVB-S2X, DVB-RCS2, CCSDS, and WiFi.
The products are applicable for ASIC and FPGA technologies and comply with the highest requirements with respect to qualityand performance. For more information, please visit our website at www.creonic.com .
Related Semiconductor IP
Related News
- Creonic Releases Updated SDA OCT IP Core Supporting OCT 4.0 and Enhanced Synchronization
- CAST Introduces 400 Gbps UDP/IP Hardware Stack IP Core for High-Performance ASIC Designs
- CAST Introduces PDM-to-PCM IP Core for Easy Interfacing of Digital Microphones with SoCs
- TES unveils a next-generation Elliptic Curve Digital Signature Algorithm (ECDSA) IP Core for Secure IoT, Blockchain, and Industrial Systems
Latest News
- Alliance for Open Media Releases AV2 Codec, Advancing Next-Generation Open Video Coding
- VeriSilicon Drives Commercial Adoption of AV2 Across Next-Generation Video and Streaming Applications
- Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs
- Menta and Presto Engineering Announce Strategic Collaboration to Accelerate Adaptive ASIC Architectures with Embedded FPGA Technology
- MIPI A-PHY To Power Industry’s First Four-Company Automotive SerDes Interoperability Demonstration at AutoSens USA