Cadence Shortens Automotive Verification Closure with New Verification IP for UFS 3.0, CoaxPress, and HyperRAM 2018-05-03 21:26:00 Verification IP
DFI Group Releases Initial Version of the DFI 5.0 Specification for High-Speed Memory Controller and PHY Interface 2018-05-03 09:40:00 Misc
Algo-Logic Systems Introduces Ultra-low-latency Tick-to-Trade System with Multi-leg Turbo Spreader 2018-05-03 09:13:00 SoC Architecture & Assembly
Cadence Innovus Implementation System Speeds Development of New Realtek DTV SoC Solution 2018-05-03 09:08:00 EDA & Design Tools
Aldec and Tamba Networks Release Ultra Low Latency Ethernet Solution for UltraScale+ FPGA at The Trading Show 2018 2018-05-03 08:59:00 SoC Architecture & Assembly
New Arm IP Helps Protect IoT Devices from Increasingly Prevalent Physical Threats 2018-05-02 15:19:00 IP Cores & Design
Control of Arm's China business transferred to Chinese investors 2018-05-02 11:41:00 Analysis & Insight
Arm Physical IP to Accelerate Mainstream Mobile and IoT SoC Designs on TSMC 22nm ULP/ULL Platform 2018-05-02 09:46:00 IP Cores & Design
Samsung Electronics Partners with Avnet ASIC Israel to Strengthen Customer Support at the Forefront of ASIC Design Services 2018-05-02 09:28:00 Strategic Partnerships
Mentor enhances tool portfolio for TSMC 5nm FinFET and 7nm FinFET Plus processes and Wafer-on-Wafer stacking technology 2018-05-02 03:19:00 EDA & Design Tools
Imperas and Andes Extend Partnership, Delivering Models and Virtual Platforms for Andes RISC-V Cores with New AndeStar V5m Extensions 2018-05-01 18:44:00 EDA & Design Tools
Sondrel and NetSpeed Team Up to Deliver the Fastest, Lowest-risk Route to SoC Solutions 2018-05-01 18:19:00 Commercial Deals
Arteris FlexNoC Licensed by Canaan Creative for Artificial Intelligence ASICs 2018-05-01 18:07:00 Commercial Deals
New MIPS I7200 Processor Core Delivers Unmatched Performance and Efficiency For Advanced LTE/5G Communications And Networking IC Designs 2018-05-01 17:58:00 IP Cores & Design