Synopsys and GLOBALFOUNDRIES Collaborate to Develop Broad Portfolio of DesignWare IP for 12LP FinFET Process
2019-06-04 15:11:00
IP Cores & Design
Semiconductor IP News Archive - Page 434 of 1948
Thalia DA attracts $2m investment to grow analog IP re-use platforms
2019-06-04 14:17:00
Strategic Partnerships
Cadence Expands Customer-Managed Cloud Options with New Cloud Passport Partner Program
2019-06-04 14:02:00
EDA & Design Tools
Cadence Introduces the Spectre X Simulator, a Massively Parallel Circuit Simulator Delivering Up to 10X Faster Simulation with the Same Golden Accuracy
2019-06-04 13:59:00
EDA & Design Tools
First Quarter 2019 Worldwide Semiconductor Equipment Billings Drop 19 Percent Year-Over-Year
2019-06-04 10:41:00
Analysis & Insight
Analog Bits and GLOBALFOUNDRIES Deliver Differentiated Analog and Mixed Signal IP for High-Performance Mobile and Compute Applications
2019-06-04 10:20:00
IP Cores & Design
ASPEED Technology adopts M31 Technology MIPI D-PHY IP to provide global 360-degree imaging SoC solution
2019-06-04 10:03:00
Commercial Deals
Truechip Offering complimentary licenses of PCIe Gen 3 Verification IP
2019-06-04 09:46:00
Verification IP
Omni Design Demos Hyperon 14-bit 1.2Gsps ADC at the 2019 Design Automation Conference in Las Vegas
2019-06-04 03:12:00
Misc
AMD and Samsung Announce Strategic Partnership in Ultra Low Power, High Performance Graphics Technologies
2019-06-03 15:30:00
Strategic Partnerships
UltraSoC embedded analytics selected to support Wave Computing's TritonAI 64 IP platform
2019-06-03 14:52:00
Commercial Deals
Gyrfalcon offers Automotive AI Chip Technology
2019-06-03 13:26:00
IP Cores & Design
Infineon to acquire Cypress, strengthening and accelerating its path of profitable growth
2019-06-03 11:26:00
Strategic Partnerships
Silvaco and Si2 Release Unique, Free 15nm Open-Source Digital Cell Library
2019-06-03 08:45:00
EDA & Design Tools
Fab Joint Venture Seen for 200 mm
2019-06-03 06:42:00
Analysis & Insight
Mentor sets new software scaling benchmark for Semiconductor Design Workload on Microsoft Azure
2019-06-03 05:09:00
EDA & Design Tools
Intel Says EUV Ready, Challenging
2019-06-03 04:54:00
Analysis & Insight
Wave Computing and Imperas Introduce New MIPS Open Simulator - MIPSOpenOVPsim
2019-05-31 13:30:00
SoC Architecture & Assembly
Avery Design Systems Announces SimCluster GLS to Accelerate Gate-Level Sign-Off Simulations
2019-05-31 13:07:00
EDA & Design Tools
Avery Design Systems Announces SymXprop for X Accurate RTL Simulation
2019-05-31 13:04:00
EDA & Design Tools