MIPS selects Imperas Reference Models for RISC-V Processor Verification
2021-11-30 08:44:00
EDA & Design Tools
Semiconductor IP News Archive - Page 286 of 1957
Micron and UMC Announce Global Settlement
2021-11-30 07:38:00
Legal & IP Strategy
Key ASIC Signed LOI to Acquire Wafer FAB in The US
2021-11-30 05:31:00
Strategic Partnerships
Silicon Catalyst Partners with Sony Semiconductor Solutions to Accelerate Semiconductor Startups
2021-11-29 17:07:00
Misc
Synopsys Expands Use of AI to Optimize Samsung's Latest Mobile Designs
2021-11-29 15:44:00
EDA & Design Tools
Profile of a traceability tool promising automation in SoC designs
2021-11-29 11:04:00
Analysis & Insight
intoPIX Unveils "TicoXS FIP" During its ProAV Virtual Event This Week
2021-11-29 09:15:00
IP Cores & Design
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP cores with Superfast speed and High-power efficiency for lag-less data processing is Silicon Proven and available in 8nm LPP for licensing
2021-11-29 06:23:00
Misc
Samsung Selects Texas as Site for $17 Billion Fab
2021-11-25 16:46:00
Analysis & Insight
Siemens receives three 2021 TSMC OIP Partner of the Year awards for next-generation design enablement
2021-11-25 16:45:00
Misc
North American Semiconductor Equipment Industry Posts October 2021 Billings
2021-11-25 16:45:00
Analysis & Insight
WiLAN Subsidiary Acquires Wired Connectivity Patent Portfolio
2021-11-25 16:45:00
Legal & IP Strategy
The Democratization of Chip Design
2021-11-25 16:45:00
Analysis & Insight
SynSense and Prophesee partner to combine neuromorphic engineering expertise for developing one-chip event-based smart sensing solution for ultra-low power edge-AI
2021-11-25 16:45:00
SoC Architecture & Assembly
Microchip Adds Second Development Tool Offering for Designers Using Its Low-Power PolarFire RISC-V SoC FPGA for Embedded Vision Applications at the Edge
2021-11-25 16:45:00
SoC Architecture & Assembly
GPU shipments increase year-over-year in Q3
2021-11-25 16:45:00
Analysis & Insight
AMIQ EDA Joins OpenHW Group and Contributes Linting Capabilities for CORE-V Open-Source RISC-V Cores and Testbenches
2021-11-25 16:44:00
Misc
VeriSilicon Image Signal Processor IP Achieved ISO 26262 Automotive Functional Safety Certification
2021-11-24 07:49:00
IP Cores & Design
CEVA SensPro Sensor Hub DSP Achieves Automotive Safety Compliant Certification for ASIL B (Random) and ASIL D (Systematic)
2021-11-23 13:12:00
IP Cores & Design
Grovf Inc. Releases Low Latency RDMA RoCE V2 FPGA IP Core for Smart NICs
2021-11-23 08:07:00
IP Cores & Design