16G Multiprotocol Serdes IP Core with different Interface protocols for your High-Speed interconnect requirements in 28HPC+ process technology is available for immediate licensing 2022-04-25 01:34:00 Misc
CoreHW Announces 5A DCDC IP Availability with Unique Advantages 2022-04-21 16:41:00 IP Cores & Design
Esperanto Technologies' Massively Parallel RISC-V AI Inferencing Solution Now in Initial Evaluations 2022-04-21 16:40:00 SoC Architecture & Assembly
BittWare Announces Partner Program to De-Risk Innovation and Reduce Time-to-Market for FPGA-Based Solutions 2022-04-21 16:40:00 SoC Architecture & Assembly
Fraunhofer IIS introduces its JPEG XS ultra-low-latency software implementation at NAB 2022 2022-04-21 16:28:00 SoC Architecture & Assembly
Dayang D3-Edit 5 integrates intoPIX JPEG XS technology for ultimate performances 2022-04-21 11:02:00 Commercial Deals
Mobile Semiconductor's 22FDX Register File Memory Compiler Receives Globalfoundries Platinum Status 2022-04-21 09:19:00 IP Cores & Design
Rapid Silicon Licenses AndesCore D45 with DSP/SIMD extensions and Andes Custom Extension Framework 2022-04-20 12:42:00 Commercial Deals
BrainChip and NVISO Partner on Human Behavioral Analytics in Automotive and Edge AI Devices 2022-04-20 02:56:00 Misc
Synopsys Introduces Industry's Highest Performance Neural Processor IP 2022-04-19 15:16:00 IP Cores & Design
Flex Logix Appoints Chris Passier as Vice President, Platform Software and Vancouver, Canada Site Executive 2022-04-19 09:07:00 People & Leadership
JESD204B Tx & Rx SerDes IP Core (12.5Gbps & 16Gbps) in 28HPC+ and 40LL process technologies for High-Speed Serial Interface with Matching Controller IP Core is available for immediate licensing 2022-04-19 08:02:00 Misc
Agnisys Announces ISO 26262 and IEC 61508 Qualification for Entire IDesignSpec Suite - SoC Specification Automation Flow 2022-04-19 03:28:00 EDA & Design Tools
Hon Hai acquires arQana's Wireless Telecommunications Business 2022-04-19 01:26:00 Strategic Partnerships
MOSCHIP Announces High Speed Serial Trace Probe (HSSTP) PHY With Link Layer in 6nm 2022-04-18 19:51:00 IP Cores & Design