Berkeley Design Automation Enters Analog/RF Mixed-Signal Verification
2008-06-05 01:09:00
EDA & Design Tools
Semiconductor IP News Archive - Page 1300 of 1948
Bluespec's High-Level Synthesis Toolset is Selected by Mercury Computer Systems for Creation of Next Generation Advanced Computing IP
2008-06-04 21:41:00
EDA & Design Tools
Globetech Solutions' Verification IP for Latest IEEE Test and Debug Standard Selected by STMicroelectronics
2008-06-04 16:24:00
Commercial Deals
Sarnoff Expands License in ESD Solution for Toshiba
2008-06-04 16:16:00
Commercial Deals
Xilinx Completes Functional Reorganization
2008-06-04 15:09:00
Strategic Partnerships
SoC Solutions Builds FPGA System in Record Time Using Synopsys' ReadyIP Flow and CAST IP Cores
2008-06-04 14:01:00
Misc
CEVA and ARM Partner to Enhance Development Support of CEVA DSP + ARM Multiprocessor SoCs
2008-06-04 13:40:00
Strategic Partnerships
Enea and CEVA Announce Enea OSE ck Real-Time Operating System for CEVA-X and CEVA-TeakLite-III DSP Architectures
2008-06-04 13:38:00
SoC Architecture & Assembly
MindTree Unveils Bluetooth Automotive SDK
2008-06-04 13:01:00
SoC Architecture & Assembly
Synopsys Delivers Comprehensive Design Support for TSMC 40-Nanometer Process
2008-06-04 10:17:00
EDA & Design Tools
Tensilica and SPIRIT DSP Form Strategic Partnership and Deliver Mobile Multimedia Audio and Voice for Xtensa HiFi 2 Audio Engine
2008-06-04 09:07:00
SoC Architecture & Assembly
Wi-LAN Reports Second Quarter 2008 Financial Results
2008-06-04 07:40:00
Financials
Freescale Delivers Virtual Platforms to Continental Using CoWare ESL 2.0 Solutions
2008-06-03 22:28:00
Misc
Altera Updates Second Quarter Guidance
2008-06-03 22:21:00
Financials
DAFCA and Denali Software Announce Collaboration to Expand FlashPoint Platform Integration Features
2008-06-03 21:30:00
Strategic Partnerships
Tundra Semiconductor Terminates Product Acquisition and License Agreements with IBM
2008-06-03 17:01:00
Strategic Partnerships
CSR launches the world's most highly integrated wireless single chip
2008-06-03 15:16:00
SoC Architecture & Assembly
ARM, Renesas Technology and Synopsys Define Industry's First Low-Power Verification Methodology
2008-06-03 15:08:00
EDA & Design Tools
Arithmatica's Datapath Synthesis Used by Solarflare Communications for New 10GBASE-T PHY Design
2008-06-03 14:35:00
Commercial Deals
Virage Logic Supports TSMC's Power Trim Service(TM) for Advanced Process Nodes
2008-06-03 13:05:00
IP Cores & Design