TSMC Announces the Opening of Advanced Backend Fab 6, Marking a Milestone in the Expansion of 3DFabric™ System Integration Technology
HSINCHU, Taiwan, R.O.C, Jun. 8, 2023—TSMC (TWSE: 2330, NYSE: TSM) today announced the opening of its Advanced Backend Fab 6, the Company’s first all-in-one automated advanced packaging and testing fab to realize 3DFabric™ integration of front-end to back-end process and testing services. The fab is prepared for mass production of TSMC-SoIC™ (System on Integrated Chips) process technology. Advanced Backend Fab 6 enables TSMC to flexibly allocate capacity for TSMC 3DFabric™ advanced packaging and silicon stacking technologies, such as SoIC, InFO, CoWoS and advanced testing, improving production yield and efficiency.
Construction of Advanced Backend Fab 6 commenced in 2020 to support the next generation of HPC, AI, mobile applications and other products, and help customers achieve product success and win market opportunities. Located in Zhunan Science Park, the fab has a base area of 14.3 hectares, making it TSMC’s largest advanced backend fab to date with a cleanroom area larger than the sum of TSMC’s other advanced backend fabs. TSMC estimates that the fab will have the capacity to produce more than 1 million 12-inch wafer equivalent 3DFabric process technology per year, and more than 10 million hours of testing services per year.
"Chiplet stacking is a key technology for improving chip performance and cost-effectiveness. In response to the strong market demand for 3D IC, TSMC has completed early deployment of advanced packaging and silicon stacking technology production capacity, and offers technology leadership through the 3DFabricTM platform,” said Dr. Jun He Vice President, Operations / Advanced Packaging Technology & Service, and Quality & Reliability. “With the production capacity that meets our customers’ needs, we will unleash innovation together and become an important partner that customers trust in the long term.”
TSMC uses intelligent manufacturing to optimize the production efficiency of the fab. The five-in-one intelligent automatic material handling system built into the factory has a total length of more than 32 kilometers. From wafer to die, production information is connected with agile dispatching systems to shorten the production cycle. These systems are combined with artificial intelligence to simultaneously execute precise process control, detect abnormalities in real time, and establish a robust die-level big data quality defense network. The data processing capacity per second is 500 times that of a front-end fab, and a complete production history for each die is constructed through die traceability.
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related News
- GUC Announces GLink-3D Die-on-Die Interface IP using TSMC N5 and N6 Process for 3DFabric Advanced Packaging Technology
- After TSMC fab in Japan, advanced packaging facility is next
- TSMC Arizona and U.S. Department of Commerce Announce up to US$6.6 Billion in Proposed CHIPS Act Direct Funding, the Company Plans Third Leading-Edge Fab in Phoenix
- ESMC Breaks Ground on Dresden Fab
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers