TeraSignal to Showcase Retimer-Less PCIe 6.0 over Optics Featuring Synopsys IP at OFC 2025
Expanding the TeraSignal TSLink Portfolio with Low-Power, Low-Latency PCIe 6.0 Re-Drivers for Optical Interconnects in AI and Compute Infrastructure
SAN FRANCISCO, April 1, 2025 – OFC 2025 – TeraSignal, a leader in intelligent interconnect technology, will showcase its new PCIe 6.0 over optics Intelligent Re-Driver solutions with Synopsys silicon-proven PCIe 6.x IP solution at OFC 2025. Designed to meet the rigorous connectivity demands of AI accelerators, GPUs, and CPUs, these innovative solutions deliver low-power, low-latency performance critical for next-generation AI and compute infrastructure. Industry’s demand for such solutions is reflected by recent standard activities, including PCIe-SIG’s discussions on “Retimer-Less PCIe Optical”, upcoming PCIe 7.0 specification release, as well as OIF new EEI: “Compute Optics Interface (COI)” project. TeraSignal is a member of both PCI-SIGÓ and OIF organizations.
AI Infrastructure players will benefit from combining the best of bread optical interconnect solutions with TeraSignal smart redriver EIC. The next generation AI Scale-up compute infrastructure require multi-tera bandwidth connectivity while maintaining low-latency, low-power, and high reliability over a range of target use cases. These use cases encompass Compute-Compute, Compute-Memory, and Compute-IO interconnects.
The TS5602 Intelligent Re-Driver, supports 4x64Gb/s PCIe connectivity and is available in a compact 7.25mm x 5.25mm FCLGA package as well as a flip chip bumped die. Key features include:
- Over 50% power reduction compared to DSP-based retimers.
- Low latency through DSP-free architecture.
- Digital eye monitoring for real-time BER visibility on every link.
- Automatic link training powered by TSLink software for streamlined setup.
These Intelligent Re-Drivers are versatile for deployment across optical cables for emerging multi-rack server architectures.
Live Demonstrations at OFC 2025
Visit the demo at Synopsys booth at OFC 2025, #2818, to see the TS5602 and Synopsys IP in action. For more information, visit www.terasignal.com.
About TeraSignal
TeraSignal is a leader in high-speed data transmission, specializing in intelligent interconnect solutions for AI-centric data centers, and next generation computing hardware, and Linear Optics. Our technologies and products focus on improving power efficiency, reducing latency, and lowering bit-error-rate, while providing advanced link diagnostics in optical interconnects. Through innovations in CMOS design and adaptive link training, TeraSignal is redefining intelligent optical connectivity across various components in AI infrastructure. Learn more at terasignal.com.
Related Semiconductor IP
- PCIe 6.0 (Gen6) Premium Controller
- PCIe Gen 5 - Validates high-speed designs, ensuring compliance and error-free performance
- PCIe Gen 4 - Enables high-speed verification, error handling, and protocol compliance
- PCIe Switch Verification IP
- PCIe Gen 6 Verification IP
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