SNOWBUSH establishes Physical Design Center in Mexico to offer expert, cost-effective analog layout
September 20, 2006 – SNOWBUSH microelectronics today announced the establishment of a Physical Design Center in Aquascalientes, Mexico to provide expert, cost-effective physical design services for analog and mixed-signal IC development.
The Center, to officially open on October 2, 2006, will offer analog and full custom digital layout and related physical design verification. The Center will deliver finished layout in SNOWBUSH’s advanced physical design flow, or work directly in the customer’s design environment.
“SNOWBUSH has extensive experience in analog and mixed-signal layout, including significant expertise in the 90nm and 65nm process nodes. Customers of the Center will benefit from this expertise, but with the cost-effectiveness of an offshore design center”, said SNOWBUSH COO, Greg Warren. “In addition, for analog IC designers and chip integrators based in North America, the Center offers real-time access to its physical design engineers, which is not available from design centers based in Asia”.
Detailed Information
To obtain more detailed information about the services offered through the Center, please contact SNOWBUSH sales at +1-416-925-5643 or sales@snowbush.com or visit www.snowbush.com.
About SNOWBUSH microelectronics
SNOWBUSH microelectronics, a privately held company founded in 1998, is a leading supplier of analog design services and customizable high performance analog IP. Combining a large pool of experienced design talent with leading edge analog design practices and best in class project management, Snowbush delivers the critical custom analog circuits needed to meet your demanding technical requirements and time-to-market schedules.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Grace, eMemory Announced Volume Production of Cost Effective OTP Solution for MCU Application
- Dolphin Integration reveal a cost effective solution to handle over-voltage operation in battery powered SoCs
- Arteris Delivers FlexNoC Physical Interconnect IP to Accelerate SoC Layout
- MagnaChip and YMC to Offer Cost Effective 0.13 micron Multiple-Time Programmable (MTP) IP Solutions
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack