Samsung licenses SafeNet's encryption technology for ASICs, SoC designs
Samsung licenses SafeNet's encryption technology for ASICs, SoC designs
By Semiconductor Business News
September 5, 2001 (8:58 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010905S0017
BALTIMORE, Md.---SafeNet Inc. here announced a licensing agreement with Samsung Semiconductor Inc., which will use the company's embedded encryption cores and technology in integrated circuit designs to serve business communications applications. Samsung Semiconductor's Cubic Solutions Division plans to integrate SafeNet's EmbeddedIP intellectual property in custom ASICs, system-on-chip products, RISC-based ICs and other products, including smart card devices. The U.S. division of the South Korean chip company said it will used the IP cores to target system applications in virtual private networks (VPNs), network infrastructure, broadband security, and wireless devices. SafeNet uses its SecureIP technology to offer security implementations of networks over the Internet and other shared networks for private communications. With the technology, Samsung can offer network device manufacturers "both faster secure data transmission and hardware s ecurity options," said Noel Park, senior vice president of Cubic Solutions. Samsung's Cubic Solutions Division in San Jose is focused on development of large-scale integrated circuits and products for networking, wireless, personal digital assistants (PDA), digital TV, set top box, storage and display applications for the U.S. market. Terms of the licensing pact were not released.
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Bluetooth Low Energy 6.0 Digital IP
- Verification IP for Ultra Ethernet (UEC)
- MIPI SWI3S Manager Core IP
- Ultra-low power high dynamic range image sensor
Related News
- Synopsys 3DIC Compiler Qualified for Samsung Foundry's Multi-Die Integration Flow, Accelerating 2.5D and 3D Designs
- Synopsys and Samsung Foundry Enable 3nm Process Technology for Power- and Performance-Demanding Mobile, HPC and AI Designs
- Aldec Releases Automated Static Linting and CDC Analysis for Microchip FPGA and SoC FPGA Designs
- Introducing the Cutting-Edge USB 3.0/ PCIe 3.0 Combo PHY IP Core in 28HPC+ for High-Performance SoC Designs
Latest News
- Arm Neural Technology Delivers Smarter, Sharper, More Efficient Mobile Graphics for Developers
- Indian Startup Builds Full-Stack Edge AI Chips Using In-House IP
- AIStorm & Tower Semiconductor Introduce Cheetah HS, World’s First Up-to-260K FPS AI-in-Imager Chip for Inspection, Robotics & Sports
- EnSilica Establishes New EU Mixed-Signal Design Centre in Budapest, Hungary
- M31 Technology: Robust Foundry Demand, Operating Margin Expected to Recover in 2026