PLDA and GUC Announce Industry's First Successful PCIe Gen 3 Controller and PHY Combination on TSMC's 28nm HPM Process Technology
PLDA XpressRICH3 PCIe controller and GUC PHY combo provides complete PCIe Gen 3 SoC solution
SAN JOSE, Calif. -- December 3, 2012 -- PLDA, the industry leader in PCI Express® IP solutions and GUC, the Flexible ASIC Leader, today announced successful test chips for the industry’s first combined PCIe Gen 3 Controller IP and PHY IP solution on TSMC 28nm HPM (High Performance Mobile) process. The combined PCIe 3.0 Controller/PHY solution is in initial production and has been incorporated into demo boards.
The TSMC 28nm HPM process offers significantly higher speeds, up to 40 percent lower power and better gate density compared to the 40nm node and is optimized for the requirements of high performance mobile devices. The ability to easily integrate a complete PCIe Gen 3 solution into end products is a significant milestone for developers of next generation mobile devices.
The PLDA XpressRICH3 IP is a high performance, low latency, highly‐configurable PCI Express Endpoint, Root port, and Switch IP, compliant to the PCI Express rev.3.0 specification. It is also available with the industry‐standard AMBA AXI4 interface under the version XpressRICH3‐AXI . GUC's PCIe Gen 3 PHY is designed for networking and high end computing SoC's. Based on
GUC’s proven high‐speed SERDES technology, the performance of PCIe Gen 3 PHY exceeds PCI Express Base Specification rev.3.0 while proving highly adaptable to any link/lane configurations.
“PLDA’s XpressRICH3 IP improves upon the leading architecture and reliability of previous generations of PLDA PCI Express interface IP and provides the performance and configurability necessary to take advantage of the benefits provided by HPM, while improving the design process for its global customer base,” stated Stephane Hauradou, CTO for PLDA.
“The GUC PHY supports the PCI Express protocol and signaling for designers working on high end computing and networking applications,” said Dr. Jen‐Tai Hsu, Senior Director of R&D, GUC. “Its low‐power and industry‐leading small footprint provide the state‐of‐the‐art flexibility required for the innovative 28nm HPM process.”
Availability
PLDA XpressRICH3 IP is available now from PLDA. The PHY IP is available now from GUC. Evaluation boards with a single chip with PLDA’s PCIe 3.0 Controller and GUC’s PCIe 3.0 PHY combination are available for review now. Please contact PLDA to request an evaluation.
About PLDA
PLDA designs and sells intellectual property (IP) cores for FPGA and System‐on‐Chip (SoC) that aim to accelerate time‐to‐market for embedded electronic designers. PLDA specializes in highspeed interface protocols and technologies such as PCIe, and Ethernet.
PLDA IP cores are provided with a complete set of tools, including FPGA prototyping cards, drivers and APIs, testbenches and benefit from a global support and sales organization able to sustain over 2,000 ASIC customers worldwide.
PLDA is a global company with offices in North America (San Jose, California) and in Europe (France, Italy). For more information visit www.plda.com.
About Global Unichip Corp.
GLOBAL UNICHIP CORP. (GUC), is the Flexible ASIC LeaderTM who provides the semiconductor industry with leading IC implementation and SoC manufacturing services. Based in Hsin‐chu Taiwan, GUC has developed a global reputation with a presence in China, Europe, Japan, Korea, and North America. GUC is publicly traded on the Taiwan Stock Exchange under the symbol 3443. For more information, visit www.guc‐asic.com.
Related Semiconductor IP
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
- HiFi iQ DSP
- CXL 4 Verification IP
Related News
- Accelerate Innovation: Harnessing the Speed of Tomorrow with PCIe Gen 4 PHY and Controller IP Cores
- Truechip Offering complimentary licenses of PCIe Gen 3 Verification IP
- Cadence Achieves PCIe 5.0 Specification Compliance for PHY and Controller IP in TSMC Advanced Technologies
- Augment your Peripheral slot's performance with the Low Power and High Throughput PCIe 4.0 PHY IP Cores in 12FFC with matching PCIe 4.0 Controller IP Cores
Latest News
- Quintauris Secures Capital Increase to Accelerate RISC-V Adoption
- MIPI Alliance Releases UniPro v3.0 and M-PHY v6.0, Accelerating JEDEC UFS Performance for Edge AI in Mobile, PC and Automotive
- Marvell to Showcase PCIe 8.0 SerDes Demonstration at DesignCon 2026
- Embedded FPGA reaches a new stage of industrial maturity – Menta at Embedded World 2026
- Fraunhofer IPMS collaborates with Korean TSN Lab to further develop IP solutions for automotive and industrial connectivity