Significant IP-core Announcements for Omnitek
BASINGSTOKE, UK. February 7th 2016 – Omnitek, a world leading supplier of FPGA based video IP and turnkey design solutions announces significant new IP releases at Integrated Systems Europe, 7-10 February - RAI Amsterdam, Booth 14-B132.
- HDMI2.0 Tx and Rx - Supporting all resolutions up to 4K60
- V-By-One Tx - Small footprint IP core for direct-drive of 4K display panels
- Image Signal Processor (ISP) - For handling raw camera sensor outputs; Contains defective pixel removal, tone mapping, colour filter array and colour processing
- Image Stitch IP - A fully automatic multi-camera image stitch system with a 4K60 output
- Projector Subsystem - A configurable projector design supporting resolutions from HD video up to 8K processing, with video I/O, de-interlacer, scaler, perspective/keystone warps, OSD, multi-image blending, and 3D support
- Warp IP Enhancements - Extension to include independent RGB warps and fully arbitrary warp mapping
- 8K OSVP - Omnitek has extended its high-quality Scalable Video Processor pipeline to include support for 8K resolutions
The result of investment in R&D and real-world customer designs that Omnitek provides for its extensive customer base, these FPGA IP cores enable low resource, low power, efficient designs to fit in the smallest Xilinx FPGA, SoC and MPSoC devices.
Omnitek CEO Roger Fawcett commented, “Our highly respected R&D team remains committed to an extensive development program of highly optimised IP which exploits all aspects of the world’s leading FPGA devices. At ISE this year we significantly extend our portfolio with no fewer than eight new product announcements for video processing, interconnect and complete sub-system IP”.
Omnitek will be demonstrating the Image Stitch IP and 8K OSVP on the Xilinx booth 14.B132 at ISE.
Related Semiconductor IP
- 4-port Receiver/Transmitter/Repeater HDCP 2.3 on HDMI 2.0 and/or DisplayPort 2.0/1.4 ESM (generation 3)
- HDMI 2.0 Verification IP
- 2-port Receiver/Transmitter/Repeater HDCP 2.3 on HDMI 2.0 and/or DisplayPort 2.0/1.4 ESM (generation 3)
- 1-port Receiver/Transmitter HDCP 2.3 on HDMI 2.0 or DisplayPort 1.4/2.0 ESM (generation 3)
- HDMI 2.0 RX PHY in SS 8LPP 1.8V, North/South Poly Orientation
Related News
- Chips&Media unveils its first Image Signal Processing (ISP) IP solution
- Chips&Media announced Image Signal Processing (ISP) IP family targeting surveillance and automotive products
- Chips&Media announced new ISP deal to provide 4K UHD (8Mpixel) resolution Image Signal Processing (ISP) IP
- T2M announces its first Image Signal Processing (ISP) Technology for advanced mobile camera applications
Latest News
- Mixel Supports Automotive SerDes Alliance (ASA) Motion Link SerDes IP
- Alphacore is gearing up for a high-impact presence at the 2025 Diminishing Manufacturing Sources and Material Shortages & Parts Management Consortium
- SpaceX Acquires Akoustis’s IP, Murata and RadRock Dominate Q2 2025 RF Front-End Patent Activity
- The TekStart Group Enters into Distribution Agreement with Techno Mathematical to Promote Advanced Hardware and Software CODEC Solutions
- Alchip Introduces 2nm Design Platform