XENTROTEC Selects the LatticeECP3 FPGA Family for Multi-Channel HD Video Multiplexer and HD-DVR Solutions
HILLSBORO, OR – AUGUST 8, 2011 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that XENTROTEC CO., LTD., Seoul, Korea, has chosen the mid-range LatticeECP3™ FPGA for use in its digital video recorder (DVR) solution. XENTROTEC, which recently introduced its new multi-channel HD video multiplexer and HD digital video recorder solution at ISC WEST 2011, selected the LatticeECP3 FPGA over competing FPGAs and application-specific alternatives because the LatticeECP3 device's built-in transceivers, high-speed memory controllers and HD-SDI capability met the rigorous end market requirements for superior DVR video and image processing performance.
"The LatticeECP3 FPGA has enabled us to implement a low cost, low power, high-performance HD-SDI-DVR solution with a high-speed DDR3 interface. In addition, the LatticeECP3 FPGA is unique in that it is the only low cost solution in the marketplace to provide up to 16 SERDES transceivers The LatticeECP3 device also helps us to promptly respond to changing market demands," said Sang Kyun, Kim (Philip), CEO of XENTROTEC. "The functionality implemented on the LatticeECP3 FPGA includes On-Screen Display, Motion Detection, SD to HD Scaler and Multi-SDI Quad and Mux. Also, because the LatticeECP3 FPGA is programmable, the solution can be scaled to apply to 4/8/8 embedded DVR channels, PCI add-in card-based solutions or video servers and switches."
"We are pleased to collaborate with XENTROTEC and are proud that our LatticeECP3 device has been selected for their video multiplexer and recorder products. Lattice is committed to the support of HD-SDI technology with our LatticeECP3 FPGA family as well as design solutions that provide optimized image processing performance," said Shakeel Peera, Lattice Director of Marketing for Silicon and Solutions. "Our collaboration with XENTROTEC will enable even more end customers to access the benefits of our SERDES-based LatticeECP3 FPGA, and our silicon and solutions roadmap will continue to support evolving video standards."
About the Lattice ECP3 FPGA Family
The mid-range LatticeECP3 FPGA family is comprised of the lowest power, SERDES-enabled FPGAs in the market today. The family's five FPGAs offer standards-compliant, multi-protocol 3.2G SERDES, DDR1/2/3 memory interfaces and high performance, cascadable DSP slices that are ideal for RF, baseband and image signal processing. Toggling at 1Gbps, the LatticeECP3 FPGAs also feature fast LVDS I/O as well as embedded memory of up to 6.8 Mbits. Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O. The LatticeECP3 FPGA family is ideally suited for deployment in high volume cost- and power-sensitive video camera and display, wireline and wireless infrastructure applications.
About XENTROTEC
XENTROTEC CO., LTD., Seoul, Korea, manufactures image processing products for security & surveillance systems that enable its customers to respond to rapidly changing market requirements. XENTROTEC develops its industry-leading products through the active management of innovation and new technologies. For more information, visit: http://www.xentrotec.com.
About Lattice Semiconductor
Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com
Related Semiconductor IP
- RISC-V CPU IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
Related News
- Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with targeted applications in DMA Streaming of Video and Data over PCIe or UDP/IP Network Interface.
- Announcing superfast, HD Audio & Video through HDMI 2.0 Tx & Rx PHY & Controller IP Cores uncompressed data transfer in 28HPC+ and 12FFC!
- MPEG-2 decoder cores facilitate interactive multi-channel streaming for media servers and personal digital video
- Palmchip introduces industry's first Multi-channel double data rate shared memory processor megacore
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers